18F4580 settings

[Bruce]

Hi Malcolm,

Read this thread. http://www.picbasic.co.uk/forum/showthread.php?t=543

If you're still stuck let me know.

[malc-c]

Bruce,

Thanks for the reply. I've managed to port Mel's RTC code from the 16F877A to the 18F4580, however I have one config setting that I can't work out

If I set the config bits in the programmer thus



The code runs. However if I let the code set the config bits it fails to run correctly. It seems I need to set the Oscillator to HS-PPL in order for it to run at the correct speed. Could you advise me what I need to add to the code to set this correctly ?

Edit:

Forgot to mention I've tried

__CONFIG    _CONFIG1H, _FOSC_HSPLL_HS_1H

and get the "symbol not previously defined" error, even though I've edited the PBP INC file.

[malc-c]

Uhmmm steep learning curve

I delved deep into that INC file in MPSAM folder and tried the following

ASM  
  __CONFIG    _CONFIG1H, _OSC_HSPLL_1H
  __CONFIG    _CONFIG2L, _PWRT_ON_2L  
  __CONFIG    _CONFIG2H, _WDT_ON_2H & _WDTPS_512_2H
  __CONFIG    _CONFIG3H, _PBADEN_OFF_3H
  __CONFIG    _CONFIG4L, _LVP_OFF_4L & _XINST_OFF_4L
ENDASM

Works fine now !

[Acetronics2]

Hi, Malc

You should update your PicFlash soft ...

v 7.13 to the day ... works much better than previous versions !!!

Alain

[Bruce]

I delved deep into that INC file in MPSAM folder and tried the following

There you go. Every config option you can use in your code is defined in the PIC types
P18Fxxxx.INC file.

They're just constants, assigned values, that turn ON or OFF each config option. Just like
you have constants with PBP.

[malc-c]

Alain, thanks for the tip.. I'm always a bit apprehensive when it comes to flashing things like BIOS and that's why I'm still on the version that came with the board - but I'll look at updating as suggested

Bruce,
I'm trying to port the 4 channel PID thermostat that DT and I were working on and having stripped out most of the USB code and resolved most of the warnings and errors I'm left with one that I can't resolve.

Its the 113 symbol not defined (INT_ENTRY_H) but its shown as in C:\pbp2.60\pbppic.18lib:1205

Anyone hot any ideas... I've looked through the INC files and can't see any ref to INT_ENTRY_H in them

[Acetronics2]

Hi, Malc

Always have a look to the end of the MPASM .inc files ...

;================================================= =========================
;
; IMPORTANT: For the PIC18 devices, the __CONFIG directive has been
; superseded by the CONFIG directive. The following settings
; are available for this device.
;
; Oscillator Selection:
; OSC = LP LP
; OSC = XT XT
; OSC = HS HS
; OSC = RC RC
; OSC = EC EC-OSC2 as Clock Out
; OSC = ECIO EC-OSC2 as RA6
; OSC = HSPLL HS-PLL Enabled
; OSC = RCIO RC-OSC2 as RA6
;
; Osc. Switch Enable:
; OSCS = ON Enabled
; OSCS = OFF Disabled
;
; Power-up Timer:
; PWRT = ON Enabled
; PWRT = OFF Disabled
;
; Brown-out Reset:
; BOR = OFF Disabled
; BOR = ON Enabled
;
; Brown-out Voltage:
; BORV = 45 4.5V
; BORV = 42 4.2V
; BORV = 27 2.7V
; BORV = 20 2.0V
;
; Watchdog Timer:
; WDT = OFF Disabled
; WDT = ON Enabled
;
; Watchdog Postscaler:
; WDTPS = 1 1:1
; WDTPS = 2 1:2
; WDTPS = 4 1:4
; WDTPS = 8 1:8
; WDTPS = 16 1:16
; WDTPS = 32 1:32
; WDTPS = 64 1:64
; WDTPS = 128 1:128
;
; Stack Overflow Reset:
; STVR = OFF Disabled
; STVR = ON Enabled
;
; Low Voltage ICSP:
; LVP = OFF Disabled
; LVP = ON Enabled
;
; Background Debugger Enable:
; DEBUG = ON Enabled
; DEBUG = OFF Disabled
;
; Code Protection Block 0:
; CP0 = ON Enabled
; CP0 = OFF Disabled
;
; Code Protection Block 1:
; CP1 = ON Enabled
; CP1 = OFF Disabled
;
; Code Protection Block 2:
; CP2 = ON Enabled
; CP2 = OFF Disabled
;
; Code Protection Block 3:
; CP3 = ON Enabled
; CP3 = OFF Disabled
;
; Boot Block Code Protection:
; CPB = ON Enabled
; CPB = OFF Disabled
;
; Data EEPROM Code Protection:
; CPD = ON Enabled
; CPD = OFF Disabled
;
; Write Protection Block 0:
; WRT0 = ON Enabled
; WRT0 = OFF Disabled
;
; Write Protection Block 1:
; WRT1 = ON Enabled
; WRT1 = OFF Disabled
;
; Write Protection Block 2:
; WRT2 = ON Enabled
; WRT2 = OFF Disabled
;
; Write Protection Block 3:
; WRT3 = ON Enabled
; WRT3 = OFF Disabled
;
; Boot Block Write Protection:
; WRTB = ON Enabled
; WRTB = OFF Disabled
;
; Configuration Register Write Protection:
; WRTC = ON Enabled
; WRTC = OFF Disabled
;
; Data EEPROM Write Protection:
; WRTD = ON Enabled
; WRTD = OFF Disabled
;
; Table Read Protection Block 0:
; EBTR0 = ON Enabled
; EBTR0 = OFF Disabled
;
; Table Read Protection Block 1:
; EBTR1 = ON Enabled
; EBTR1 = OFF Disabled
;
; Table Read Protection Block 2:
; EBTR2 = ON Enabled
; EBTR2 = OFF Disabled
;
; Table Read Protection Block 3:
; EBTR3 = ON Enabled
; EBTR3 = OFF Disabled
;
; Boot Block Table Read Protection:
; EBTRB = ON Enabled
; EBTRB = OFF Disabled
;
;================================================= =========================
;================================================= =========================
;
; Configuration Bits
;
; Data Sheet Include File Address
; CONFIG1H = Configuration Byte 1H 300001h
; CONFIG2L = Configuration Byte 2L 300002h
; CONFIG2H = Configuration Byte 2H 300003h
; CONFIG4L = Configuration Byte 4L 300006h
; CONFIG5L = Configuration Byte 5L 300008h
; CONFIG5H = Configuration Byte 5H 300009h
; CONFIG6L = Configuration Byte 6L 30000Ah
; CONFIG6H = Configuration Byte 6H 30000Bh
; CONFIG7L = Configuration Byte 7L 30000Ch
; CONFIG7H = Configuration Byte 7H 30000Dh
;
;================================================= =========================

;Configuration Byte 1H Options
_OSCS_ON_1H EQU H'DF' ; Oscillator Switch enable
_OSCS_OFF_1H EQU H'FF'

_LP_OSC_1H EQU H'F8' ; Oscillator type
_XT_OSC_1H EQU H'F9'
_HS_OSC_1H EQU H'FA'
_RC_OSC_1H EQU H'FB'
_EC_OSC_1H EQU H'FC' ; External Clock w/OSC2 output divide by 4
_ECIO_OSC_1H EQU H'FD' ; w/OSC2 as an IO pin (RA6)
_HSPLL_OSC_1H EQU H'FE' ; HS PLL
_RCIO_OSC_1H EQU H'FF' ; RC w/OSC2 as an IO pin (RA6)

;Configuration Byte 2L Options
_BOR_ON_2L EQU H'FF' ; Brown-out Reset enable
_BOR_OFF_2L EQU H'FD'
_PWRT_OFF_2L EQU H'FF' ; Power-up Timer enable
_PWRT_ON_2L EQU H'FE'
_BORV_25_2L EQU H'FF' ; BOR Voltage - 2.5v
_BORV_27_2L EQU H'FB' ; 2.7v
_BORV_42_2L EQU H'F7' ; 4.2v
_BORV_45_2L EQU H'F3' ; 4.5v

;Configuration Byte 2H Options
_WDT_ON_2H EQU H'FF' ; Watch Dog Timer enable
_WDT_OFF_2H EQU H'FE'
_WDTPS_128_2H EQU H'FF' ; Watch Dog Timer PostScaler count
_WDTPS_64_2H EQU H'FD'
_WDTPS_32_2H EQU H'FB'
_WDTPS_16_2H EQU H'F9'
_WDTPS_8_2H EQU H'F7'
_WDTPS_4_2H EQU H'F5'
_WDTPS_2_2H EQU H'F3'
_WDTPS_1_2H EQU H'F1'

;Configuration Byte 4L Options
_DEBUG_ON_4L EQU H'7F' ; Enabled
_DEBUG_OFF_4L EQU H'FF' ; Disabled

_LVP_ON_4L EQU H'FF' ; Enableda
_LVP_OFF_4L EQU H'FB' ; Disabled

_STVR_ON_4L EQU H'FF' ; Stack over/underflow Reset enable
_STVR_OFF_4L EQU H'FE'

;Configuration Byte 5L Options
_CP0_ON_5L EQU H'FE' ; Enabled
_CP0_OFF_5L EQU H'FF' ; Disabled

_CP1_ON_5L EQU H'FD' ; Enabled
_CP1_OFF_5L EQU H'FF' ; Disabled

_CP2_ON_5L EQU H'FB' ; Enabled
_CP2_OFF_5L EQU H'FF' ; Disabled

_CP3_ON_5L EQU H'F7' ; Enabled
_CP3_OFF_5L EQU H'FF' ; Disabled

;Configuration Byte 5H Options
_CPB_ON_5H EQU H'BF' ; Enabled
_CPB_OFF_5H EQU H'FF' ; Disabled

_CPD_ON_5H EQU H'7F' ; Enabled
_CPD_OFF_5H EQU H'FF' ; Disabled

;Configuration Byte 6L Options
_WRT0_ON_6L EQU H'FE' ; Enabled
_WRT0_OFF_6L EQU H'FF' ; Disabled

_WRT1_ON_6L EQU H'FD' ; Enabled
_WRT1_OFF_6L EQU H'FF' ; Disabled

_WRT2_ON_6L EQU H'FB' ; Enabled
_WRT2_OFF_6L EQU H'FF' ; Disabled

_WRT3_ON_6L EQU H'F7' ; Enabled
_WRT3_OFF_6L EQU H'FF' ; Disabled

;Configuration Byte 6H Options
_WRTB_ON_6H EQU H'BF' ; Enabled
_WRTB_OFF_6H EQU H'FF' ; Disabled

_WRTC_ON_6H EQU H'DF' ; Enabled
_WRTC_OFF_6H EQU H'FF' ; Disabled

_WRTD_ON_6H EQU H'7F' ; Enabled
_WRTD_OFF_6H EQU H'FF' ; Disabled

;Configuration Byte 7L Options
_EBTR0_ON_7L EQU H'FE' ; Enabled
_EBTR0_OFF_7L EQU H'FF' ; Disabled

_EBTR1_ON_7L EQU H'FD' ; Enabled
_EBTR1_OFF_7L EQU H'FF' ; Disabled

_EBTR2_ON_7L EQU H'FB' ; Enabled
_EBTR2_OFF_7L EQU H'FF' ; Disabled

_EBTR3_ON_7L EQU H'F7' ; Enabled
_EBTR3_OFF_7L EQU H'FF' ; Disabled

;Configuration Byte 7H Options
_EBTRB_ON_7H EQU H'BF' ; Enabled
_EBTRB_OFF_7H EQU H'FF' ; Disabled

; To use the Configuration Bits, place the following lines in your source code
; in the following format, and change the configuration value to the desired
; setting (such as _BOR_ON_2L). These are currently commented out here
; and each __CONFIG line should have the preceding semicolon removed when
; pasted into your source code.

; The following is a assignment of address values for all of the configuration
; registers for the purpose of table reads
_CONFIG1H EQU H'300001'
_CONFIG2L EQU H'300002'
_CONFIG2H EQU H'300003'
_CONFIG4L EQU H'300006'
_CONFIG5L EQU H'300008'
_CONFIG5H EQU H'300009'
_CONFIG6L EQU H'30000A'
_CONFIG6H EQU H'30000B'
_CONFIG7L EQU H'30000C'
_CONFIG7H EQU H'30000D'
_DEVID1 EQU H'3FFFFE'
_DEVID2 EQU H'3FFFFF'
_IDLOC0 EQU H'200000'
_IDLOC1 EQU H'200001'
_IDLOC2 EQU H'200002'
_IDLOC3 EQU H'200003'
_IDLOC4 EQU H'200004'
_IDLOC5 EQU H'200005'
_IDLOC6 EQU H'200006'
_IDLOC7 EQU H'200007'

;Program Configuration Register 1H
; __CONFIG _CONFIG1H, _OSCS_OFF_1H & _RCIO_OSC_1H

;Program Configuration Register 2L
; __CONFIG _CONFIG2L, _BOR_ON_2L & _BORV_25_2L & _PWRT_OFF_2L

;Program Configuration Register 2H
; __CONFIG _CONFIG2H, _WDT_ON_2H & _WDTPS_128_2H

;Program Configuration Register 4L
; __CONFIG _CONFIG4L, _STVR_ON_4L

All explanations are there for " mature " devices ... halas those examples do not appear in the recent chip files ...

Alain

[Acetronics2]

Malc,

It's an error generated from DTinterupts ...

Didn't you declare a low priority interrupt and NO high priority interrupt ???


For PicFlash ... no soucy ... I always test things before emitting an advice ... ROFL !

Alain