Pbp - icd

[Charles Linquis]

I have always used an ICD2 or ICD3 to program parts. I never "integrated" PBP into MPLAB. I invoke MPLAB only to program bootloaders into the chip.

Now, I would like to take things one step further and actually use the Microchip ICD to figure out where my code is at any given time. I don't need to actually see the PBP line that is executing (although that would be nice).

Watching the ASM lines and being able to insert breakpoints would be good enough.

So - I have an ASM file generated by PBP, and I want to do some debugging. I have tried virtually everything but can't get the debugger to run. Has someone actually done this? If so, do you have a step-by-step?

[rmteo]

Interesting...

[Charles Linquis]

Does your comment mean that everyone else is doing this and I simply am too uninformed to know how, or that it is impossible, or that I'm a fool for even asking, or that the instructions for how to do this is the first item in the forum FAQ?

Which one?

[rmteo]

None of the above. The interesting thing is the lack of responses after almost 100 views - indicating that few here use a very useful tool/methodology for MCU application development.

[Charles Linquis]

I have an enormous (at least in PIC terms) application where I'm using most all of the capabilities of two 18F8723's "strapped together" and communicating with each other. Both chips make heavy use of interrupts (both ASM and PBP).

So many things were going on at one time and the program was hanging. We really wanted to watch the execution but couldn't find a good way.

Everything seems to be working now.

[rmteo]

Based on your description, I would look into a higher spec MCU (possibly a PIC24, dsPIC or PIC32) and also utilize an RTOS such this http://www.avix-rt.com/Products/Spec...ification.html

The developer is very active on the MC forums and the product looks really good.

[Bill Legge]

Charles,

Yes, I've done it. Nothing difficult about it - but there are quite a number of steps and settings that if incorrect will stuff up the de-bug.

I first tried it without paying much/any attention to the Microchip docs - and failed.

Next, I slowly worked my way through the Microchip example and got the hang of it.

There is a microchip list of 'common ICD2 mistakes' that is useful.

I've not done it for a few months so my memory is a bit hazy. However, the common errors that I made were:

1. The ICD2 MUST have it's own 5volt supply in de-bug mode.
2. The target MUST have it's own supply.
3. The sequence of powering up the ICD2 and Target board matters.
4. The ICD2 must be switched from 'Programmer' to 'De-bug'.
5. Single step only works for interrupt routines if you set a breakpoint inside the routine.

The 'step by step' instructions are Microchip document:
'MPLAB ICD2 USER'S GUIDE'
I failed to get the de-bug running till I had done the Tutorial in this document.

Sorry if all the above is a 'blinding glimpse of the obvious!'

Regards Bill Legge

[Charles Linquis]

I appreciate the help. You are right, I should have used a "bigger" part.

I needed 3 interrupt-driven serial ports in addition to a ton of other functions (6 tachometers, 6 PWM, 2 X I2C and 30 or so lines of I/O.

Two of the serial ports have to parse large amounts of (nearly) random data coming from networks (using Lantronix XPorts). Both XPorts have to be configured only through the serial port. Both ports have to be able to initiate telnet sessions to remote computers after PINGing them first (to make certain they are there), then going through a complex handshake with logins and passwords and finally establishing a Serial-Over-Lan connection (SOL). The remote computer can then issue commands to the PICs over that SOL link. Failovers and retries have to be automatic and seamless.

The 3rd serial port is used for configuration, control and requesting status.

Two of us worked on it. It all works - but it wasn't easy!

[rmteo]

Sounds like a really challenging and interesting project. I have been working with LPC176x Cortex M3 devices. Some pertinent specs, not bad for a $6 chip:

a. ARM Cortex-M3 32-bit processor, running at 100 MHz - single cycle.
b. Nested Vectored Interrupt Controller (NVIC).
c. 512 kB on-chip flash programming memory, 64kB total RAM.
d. Eight channel General Purpose DMA controller that can be used with SSP, I2S-bus, UART, Analog-to-Digital and Digital-to-Analog converter peripherals, timer match signals, and for memory-to-memory transfers.
e. Ethernet MAC with RMII interface and dedicated DMA controller.
f. USB 2.0 full-speed device/Host/OTG controller with dedicated DMA controller.
g. Four UARTs with fractional baud rate generation, internal FIFO, and DMA support.
h. CAN 2.0B controller with two channels..
j. SPI controller with synchronous, serial, full duplex communication and programmable data length.
k. Three enhanced I2C bus interfaces, one with an open-drain output supporting full I2C specification and Fast mode plus with data rates of 1 Mbit/s.
l. 70 General Purpose I/O (GPIO) pins with configurable pull-up/down resistors.
m. 12-bit Analog-to-Digital Converter (ADC) with input multiplexing among eight pins.
n. Four general purpose timers/counters, with a total of eight capture inputs and ten compare outputs.
p. One motor control PWM with support for three-phase motor control.
q. Quadrature encoder interface that can monitor one external quadrature encoder.
r. One standard PWM/timer block with external count input.
s. RTC with a separate power domain and dedicated RTC oscillator - includes 20 bytes of battery-powered backup registers.
t. Repetitive interrupt timer provides programmable and repeating timed interrupts.
u. Integrated PMU (Power Management Unit) automatically adjusts internal regulators to minimize power consumption during Sleep, Deep sleep, Power-down, and Deep power-down modes.
v. Code Read Protection (CRP) with different security levels.
w. Unique device serial number for identification purposes.
x. Standard JTAG test/debug interface for compatibility with existing tools.
y. Emulation trace module enables non-intrusive, high-speed real-time tracing of instruction execution.

[ScaleRobotics]

Sounds like a really challenging and interesting project. I have been working with LPC176x Cortex M3 devices. Some pertinent specs, not bad for a $6 chip:

a. ARM Cortex-M3 processor, running at 100 MHz - single cycle.
b. Nested Vectored Interrupt Controller (NVIC).
c. 512 kB on-chip flash programming memory.
d. Eight channel General Purpose DMA controller that can be used with SSP, I2S-bus, UART, Analog-to-Digital and Digital-to-Analog converter peripherals, timer match signals, and for memory-to-memory transfers.
e. Ethernet MAC with RMII interface and dedicated DMA controller.
f. USB 2.0 full-speed device/Host/OTG controller with dedicated DMA controller.
g. Four UARTs with fractional baud rate generation, internal FIFO, and DMA support.
h. CAN 2.0B controller with two channels..
j. SPI controller with synchronous, serial, full duplex communication and programmable data length.
k. Three enhanced I2C bus interfaces, one with an open-drain output supporting full I2C specification and Fast mode plus with data rates of 1 Mbit/s.
l. 70 General Purpose I/O (GPIO) pins with configurable pull-up/down resistors.
m. 12-bit Analog-to-Digital Converter (ADC) with input multiplexing among eight pins.
n. Four general purpose timers/counters, with a total of eight capture inputs and ten compare outputs.
p. One motor control PWM with support for three-phase motor control.
q. Quadrature encoder interface that can monitor one external quadrature encoder.
r. One standard PWM/timer block with external count input.
s. RTC with a separate power domain and dedicated RTC oscillator - includes 20 bytes of battery-powered backup registers.
t. Repetitive interrupt timer provides programmable and repeating timed interrupts.
u. Integrated PMU (Power Management Unit) automatically adjusts internal regulators to minimize power consumption during Sleep, Deep sleep, Power-down, and Deep power-down modes.
v. Code Read Protection (CRP) with different security levels.
w. Unique device serial number for identification purposes.
x. Standard JTAG test/debug interface for compatibility with existing tools.
y. Emulation trace module enables non-intrusive, high-speed real-time tracing of instruction execution.

Sounds like you left one out....

z. One SKS w/ GD

(starndard kitchen sink with garbage disposal)

Really that is a lot of features packed in there.

[Charles Linquis]

Yes, it looks like my applications have largely outgrown the 18F series and PBP. I do plan to continue using them for small applications. And I'll still have about 450K lines of legacy code, so I'll still keep you guys company.