Hi, Ive done a lot of reading and it seems that the clock and be slowed down as much as you want which is good for testing. Im getting a little confused by the actual SD protocol though. Different sites are saying different things.

I have some example code in C. I dont completely understand C but it looks like its saying things should happen in this order:-
Enable the SPI interface
Send 80 clocks using dummy bytes (0xFF)
Enable CS (low)
Send another dummy byte
Send the init command (0x40, 0x00, 0x00, 0x00, 0x00, 0x95)
Repeatedly send a dummy byte until the card replies

Another site says the CS pin should be asserted before sending the 80 clocks. This is confusing as the pin is active low. It did read as though "assert" means low but as this C example seems to be the oposite i assume it means high.