ADC or ADCIN "bias" problem?

[RussMartin]

Alain, I didn't post code, schematic, or board because all three work just fine with a 16F88. Now, except for controlling the output pins (which Darrel solved in http://www.picbasic.co.uk/forum/showthread.php?t=12739), the only issue is this "bias" (or whatever) on the AN channels.

Melanie, I've tried to be sure I've turned off the comparators, the CCP modules, and the capacitive sensing module. I don't know if I've missed something, but here's what I did:

ANSELA= %00011111
ANSELB= %11000000
CCP1CON=%00000000
CCP2CON=%00000000
CCP3CON=%00000000
CCP4CON=%00000000
OSCCON= %11110000
TRISA = %01111111
TRISB = %11000001

ADCON1.7 =1
CM1CON0.7=0
CM2CON0.7=0
CPSCON0 =0

DEFINE ADC_BITS 10
DEFINE ADC_CLOCK 6
DEFINE ADC_SAMPLEUS 12

I'll take a look at the Vref matter; maybe that's it. The pots seem okay, with good linear travel and value proportionate to rotation. Remember, I'm seeing the effect with the pins strapped to ground, too.

[falingtrea]

Have you tried just converting one channel and not multiplexing the ADC? I have had issues before because a previous channel precharged the ADC and would see the same kind of "bias" voltage even though the channel being converted is grounded.

[RussMartin]

Once again, Melanie, you've saved my bacon!

It was Vref+ and Vref-. This is what I needed to do:

ADCON1 = %11101000

Bit 2 "0" selects Vss (internal) for Vref-
Bits 1-0 "0" selects Vdd (internal) for Vref+

No wonder the result was screwy!

Thanks!

Tim, thanks for your note, too. I'll remember that as a troubleshooting tip for the future.