Acquisition time in DT_Analog when oversampling?

[tjkelly]

I am using the 18F2420 and a variation of the DT_Analog routines where I am writing the registers directly to perform oversampled A/D on multiple channels in succession.

From the datasheet, when changing channels you must program ADCON2 with an automatic acquisition delay or set it to no delay and handle the delay yourself. When oversamplling the same channel, what happens at the end of a conversion when the capacitor disconnects? Since I am not changing channels do I immediately set the GO/DONE bit and let another conversion start?

[J. Mark Wolf]

What are "DT_Analog routines"?

[HenrikOlsson]

It's a routine, written by Darrel Taylor, that can be used to increase the effective resolution of the ADC by oversamplig. You can find details here.

[Charlie]

It's a routine, written by Darrel Taylor, that can be used to increase the effective resolution of the ADC by oversamplig. You can find details here.

post is now here item 42.

[tjkelly]

I made a mistake in my description above. From the datasheet:

"In either case, when the conversion is completed, the GO/DONE bit is cleared, the ADIF flag is set and the A/D begins sampling the currently selected channel again. If an acquisition time is programmed, there is nothing to indicate if the acquisition time has ended or if the conversion has begun."

It appearts that I should just stay in a loop with an acquisition delay of 2-3 us each time. The reason I ask is that everything appears to work either way, with or without delaying each sample.