Re: 12f675_fuse_about_to_blow!
It did / does. Bruce's code for the Tx - Rx on button press works a treat, it never misses a beat. The problem appears when we try and add in a time delay loop.But the other code (Bruce's) worked when my mod did not appear to ???
Here's Bruce's original Rx code (a button press on the transmitter = immediate led flash on Rx board).
And here's the 'chopped down' version which doesn't Rx on every Tx but DOES Rx after the timing loop on the Tx has run.Code:'**************************************************************** '* Name : rfPIC_RX.BAS * '* Author : B. Reynolds * '* Notice : Copyright (c) 2007 Reynolds Electronics * '* : All Rights Reserved * '* Date : 10/09/2007 * '* Version : 1.0 (Momentary decoder version) * '* Notes : 2-Bit decoder for Microchip RF dev system * '* : with rfRXD0420 module installed in PICkit 1 board * '* PIC : PIC16F684 Originally PIC16F676!!! * '**************************************************************** @ __config _INTRC_OSC_NOCLKOUT & _WDT_OFF & _MCLRE_OFF & _CP_OFF & _PWRTE_ON DEFINE OSC 4 DEFINE NO_CLRWDT 1 ' Watchdog timer is disabled, so we don't need to reset it DEFINE INTHAND RESET_VT ' Interrupt on Timer1 overflow to reset outputs in 65.5mS ' if no serial data received in this time period SYMBOL D_IN = PORTC.1 ' data input pin SYMBOL TMR1IF = PIR1.0 ' Timer1 overflow interrupt flag (reset in int handler) SYMBOL TMR1IE = PIE1.0 ' Timer1 interrupt enable bit 'Variables for saving state in interrupt handler wsave VAR BYTE $5F system ' Saves W ssave VAR BYTE bank0 system ' Saves STATUS psave VAR BYTE bank0 system ' Saves PCLATH fsave VAR BYTE bank0 system ' Saves FSR ' Working variables MATCH VAR BYTE bank0 system ' Match variable DAT_OUTB VAR BYTE ' Holds decoded data for output DAT_IN1 VAR BYTE ' 1st Data byte DAT_IN2 VAR BYTE ' 2nd Data byte for verify CHK_SUM VAR BYTE ' Holds checksum received CheckSum VAR BYTE ' Computed checksum of all bytes received LOOPS VAR BYTE ' Loop var ' Constants Synch CON "~" ' 01111110 synch byte N2400 CON 16780 ' 2400 bps inverted N4800 CON 188 ' 4800 bps inverted ' hardware init PORTA = 0 TRISA = %00111001 ' RA1 and RA2 are LED outputs PORTC = 0 ' Clear outputs on power-up TRISC = %00111110 ' RC1 = RF input IOC = 0 ' Interrupt on change disabled VRCON = 0 ' Comparator Vref disabled CMCON0 = 7 ' Disable comparators ANSEL = 0 ' disable A/D OPTION_REG = 128 ' Pull-ups off ' Setup Timer1 for resets after ~65.5mS T1CON = %00000000 ' Internal clock, 1:1 prescale, Timer1 off for now TMR1L = 0 TMR1H = 0 ' Timer1 low & high bytes cleared TMR1IF = 0 ' Clear Timer1 overflow flag before enabling interrupt TMR1IE = 1 ' Enable Timer1 overflow interrupt INTCON = %11000000 ' Global & peripheral ints enabled MATCH = 0 ' Clear match count GOTO MAIN ' Jump over int handler ASM ; Timer1 overflow interrupt resets outputs when no valid key press ; is detected within ~65mS RESET_VT movwf wsave ; Save W swapf STATUS, W ; Swap STATUS to W (swap avoids changing STATUS) clrf STATUS ; Clear STATUS movwf ssave ; Save swapped STATUS movf PCLATH, W ; Move PCLATH to W movwf psave ; Save PCLATH movf FSR, W ; Move FSR to W movwf fsave ; Save FSR ; Do interrupt stuff here bcf T1CON,TMR1ON ; Stop Timer1 clrf TMR1L ; Clear low byte clrf TMR1H ; Clear high byte bcf PIR1,TMR1IF ; Clear Timer1 interrupt flag bit clrf PORTA ; Clear outputs on button release clrf MATCH ; Clear match variable ; Restore FSR, PCLATH, STATUS and W registers movf fsave, W ; retrieve FSR value movwf FSR ; Restore it to FSR movf psave, W ; Retrieve PCLATH value movwf PCLATH ; Restore it to PCLATH swapf ssave, W ; Get swapped STATUS value (swap to avoid changing STATUS) movwf STATUS ; Restore it to STATUS swapf wsave, F ; Swap the stored W value swapf wsave, W ; Restore it to W (swap to avoid changing STATUS) bsf T1CON,TMR1ON ; Re-enable Timer1 before exiting interrupt handler retfie ; Return from the interrupt ENDASM MAIN: ' Fire up Timer1 before entry to serial input routine T1CON.0 = 1 ' at 4MHz Timer1 overflows in 65536 * 1uS (~65.5mS) if no Synch byte ' and serial data arrive on time. SERIN2 timeout & label options ' are useless with a noisy RF receiver output - as noise continually ' resets the timeout period causing it to hang forever. ' Wait for Synch byte, then get new inbound data & checksum SERIN2 D_IN,N2400,[WAIT(Synch),DAT_IN1,DAT_IN2,CHK_SUM] T1CON.0 = 0 ' Stop Timer1 once we've received data TMR1L = 0 ' Clear low byte TMR1H = 0 ' Clear high byte ' / **** Begin data validation **** / ' Calculate checksum by adding 2 data bytes together CheckSum = DAT_IN1 + DAT_IN2 ' Test new checksum against one received in CHK_SUM IF CheckSum != CHK_SUM THEN MAIN ' Failed checksum, return ' Test data bytes for match IF (DAT_IN1) != (DAT_IN2) THEN MAIN ' Failed data comparison, return MATCH = MATCH + 1 ' We have a match so increment match count IF MATCH = 2 THEN DECODE ' Everything matched twice, we're good GOTO Main ' Else do it all over ' Everything looking good - so place new data on outputs DECODE: ' Place decoded values on port pins.. PORTA = DAT_IN1 & %00000110 DAT_IN1 = !DAT_IN2 ' Destroy the match MATCH = 0 GOTO MAIN END
DaveCode:@ __config _INTRC_OSC_NOCLKOUT & _WDT_OFF & _MCLRE_OFF & _CP_OFF & _PWRTE_ON DEFINE OSC 4 DEFINE NO_CLRWDT 1 ' Watchdog timer is disabled, so we don't need to reset it SYMBOL D_IN = PORTC.1 ' data input pin ' Working variables MATCH VAR BYTE bank0 system ' Match variable DAT_OUTB VAR BYTE ' Holds decoded data for output DAT_IN1 VAR BYTE ' 1st Data byte DAT_IN2 VAR BYTE ' 2nd Data byte for verify CHK_SUM VAR BYTE ' Holds checksum received CheckSum VAR BYTE ' Computed checksum of all bytes received LOOPS VAR BYTE ' Loop var VISITS var word ' Test BYTE with a value of 3 - DT X VAR BYTE ' Loop counter value Byte - DT Total var byte ' Constants Synch CON "~" ' 01111110 synch byte N2400 CON 16780 ' 2400 bps inverted N4800 CON 188 ' 4800 bps inverted ' hardware init PORTA = 0 TRISA = %00111001 ' RA1 and RA2 are LED outputs PORTC = 0 ' Clear outputs on power-up TRISC = %00101110 ' RC1 = RF input IOC = 0 ' Interrupt on change disabled VRCON = 0 ' Comparator Vref disabled CMCON0 = 7 ' Disable comparators ANSEL = 0 ' disable A/D OPTION_REG = 128 ' Pull-ups off INTCON = %11000000 ' Global & peripheral ints enabled MATCH = 0 ' Clear match count GOTO MAIN ' Jump over int handler MAIN: ' Wait for Synch byte, then get new inbound data & checksum SERIN2 D_IN,N2400,[WAIT(Synch),DAT_IN1,DAT_IN2,CHK_SUM,VISITS.HIGHBYTE,VISITS.LOWBYTE] ' / **** Begin data validation **** / ' Calculate checksum by adding 2 data bytes together CheckSum = DAT_IN1 + DAT_IN2 ' Test new checksum against one received in CHK_SUM IF CheckSum != CHK_SUM THEN MAIN ' Failed checksum, return ' Test data bytes for match IF (DAT_IN1) != (DAT_IN2) THEN MAIN ' Failed data comparison, return ' MATCH = MATCH + 1 ' We have a match so increment match count ' IF MATCH = 2 THEN DECODE ' Everything matched twice, we're good ' GOTO Main ' Else do it all over ' Everything looking good - so place new data on outputs DECODE: 'DAT_IN1 = !DAT_IN2 ' Destroy the match ' MATCH = 0 IF VISITS = 300 THEN LED GOTO MAIN lED: for X = 1 to 3 'Test=7 or 600 HIGH PORTA.1 PAUSE 500 LOW PORTA.1 pause 500 next X GOTO MAIN END
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