Timer0 Reload based on ADC result

[Bruce]

With 36 samples per cycle (of your 50Hz sine wave) this sounds about right.

The app continuously adjusts PWM duty cycle to create the sine waves, so
1.8kHz/36 (samples per cycle)=50Hz.

[Cyborg]

All right. Thank you very much.

[Cyborg]

Hi again,

I changed my sine entries to 72 samples from 0 to 350 in steps of 5. According to calculations above, TMR0 interrupt is generated every 141us (88*1.6us) so for 142 samples the frequency is 50 Hz (1/0.02 s). However, I am getting at the output 40 Hz sine wave! What I am doing wrong ? I used 72 samples instead of 142 also as it is one complete sine wave but I still get 40 Hz!

In the first post, the sine table had 19 entries from 270 - 90 in steps 10 and I was getting 50 Hz sine wave.

I am simulating my program on Proteus 7.5.

Thanks

[Bruce]

What do you get with a timer reload value of 65,362?

[Cyborg]

I get 37.5 Hz

[Bruce]

Is your ADC=200?

How many entries do you have in the new table?

[Cyborg]

My ADC value is 200 (50 Hz) and my new table has 72 entries from 0 to 350 in steps of 5.