Looking at the datasheet:
6.7 Timer1 Interrupt

The Timer1 register pair (TMR1H:TMR1L) increments
to FFFFh and rolls over to 0000h. When Timer1 rolls
over, the Timer1 interrupt flag bit of the PIR1 register is
set. To enable the interrupt on rollover, you must set
these bits:
• TMR1ON bit of the T1CON register
• TMR1IE bit of the PIE1 register
• PEIE bit of the INTCON register
• GIE bit of the INTCON register
The interrupt is cleared by clearing the TMR1IF bit in
the Interrupt Service Routine.
With a 4MHz clock, (TMR1H:TMR1L) increments every 1uS. To generate an interrupt every 20mS, you want it to count 20,000 - so preload (TMR1H:TMR1L) with 65535-20000 = 45535 or FFFFh-4E20h=B1DFh.