Hi Bill

This looks like a timing problem to me. The clock is getting skewed with time due to capacitive load changes due to temperature drift (maybe) A possible solution maybe to buffer your clock and Load lines which are common to all the 7219s.

A couple of suggestions
- try to use the internal oscillator @4MHz if available so that this might me ruled out.
- rule out a ground problem by jumpering the grounds. This may be a cause for signal level deterioration at the last chip
- Use standard decoupling of 0.1mfd. The 47mfd sounds generous but may not be good to filter the ripples caused due to the displays scanning.