thanks for your reply
trust me .. answer is yes
on page 3 (and +) from the SP5055 datasheet
you ca read this
READ MODE
When the device is in the read mode the status data read from
the device on the SDA line takes the form shown in Table 2.
Bit 1 (POR) is the power-on reset indicator and is set to a log
1 if the power supply to the device has dropped below 3V and th
programmed information lost (e.g., when the device is initiall
turned on). The POR is set to 0 when the read sequence i
terminated by a stop command. The outputs are all set to hig
impedance when the device is initially powered up. Bit 2 (FL
indicates whether the device is phase locked, a logic 1 is presen
if the device is locked and a logic 0 if the device is unlocked.

datasheet is here
http://f1chf.free.fr/PDF/SP5055.PDF

and I know friends who handle the FL bit to check
if everything is OK ..