You need to read RCREG to clear RCIF. I don't think you can clear it with pir1.5 = 0. If you don't clear RCIF you'll jump right back into the int handler each time you re-enable interrupts exiting your int handler.
Try something like this. Just change the LCD defines to match your LCD setup.
Code:
DEFINE OSC 40 ' _HSPLL_OSC_1H & _HS_OSC_1H
' // Setup for dev board LCD pinout
DEFINE LCD_DREG PORTB ' LCD I/O port
DEFINE LCD_DBIT 4 ' 4-bit data from RB4 to RB7
DEFINE LCD_RSREG PORTB ' Register select port
DEFINE LCD_RSBIT 2 ' Register select pin
DEFINE LCD_EREG PORTB ' Enable port
DEFINE LCD_EBIT 3 ' Enable pin
DEFINE LCD_BITS 4 ' 4-bit data bus
DEFINE LCD_LINES 2 ' 2-line LCD
DEFINE LCD_COMANDUS 2000 ' LCD command delay
DEFINE LCD_DATAUS 50 ' LCD data delay
' // Set USART parameters
DEFINE HSER_TXSTA 24h ' Enable TXEN and BRGH=1
DEFINE HSER_RCSTA 90h ' SPEN & CREN = 1
DEFINE HSER_SPBRG 129 ' SPBRG val for 19,200bps @40MHz
' // Set USART interrupts, A/D, reg defs, etc,,
SYMBOL RCIF = PIR1.5 ' Received character int flag
INTCON = %11000000 ' enable global and Peripheral interrupt
PIE1.5 = 1 ' USART receive interrupt enabled
ADCON1 = %00000111 ' Turn off A/D all digital
X VAR BYTE
Teller var byte
pause 1000 ' LCD power-up / init time
lcdout $FE,1 ' Clear screen / home cursor
on interrupt GoTo handle ' Point to int handler
Main:
lcdout $FE,1,dec teller ' Print to LCD clearing previous char
for X = 0 TO 50 ' Loop for 1 second
pause 20
next X
goto Main
Disable ' Interrupt handler
Handle:
while RCIF ' While RCIF is set, keep reading characters
Teller = RCREG ' Reading character into Teller clears RCIF
wend
Resume
Enable
END
You may need to edit your default PBP 18F452.INC header file to make sure you're turning on HSPLL for 40MHz with a 10MHz crystal.
Commented out this line.
;__CONFIG _CONFIG1H, _OSCS_OFF_1H & _XT_OSC_1H
Add this below it, and save the file.
__CONFIG _CONFIG1H, _HSPLL_OSC_1H & _HS_OSC_1H
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