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Code:DEFINE OSC 40 ' Set for 40Mhz operation DEFINE NO_CLRWDT 1 DEFINE _18F8722 1 DEFINE HSER_RCSTA1 90H DEFINE HSER_TXSTA1 24H DEFINE HSER_RCSTA2 90H DEFINE HSER_TXSTA2 24H DEFINE HSER_CLROERR 1 DEFINE HSER2_CLROERR 1 DEFINE CCP1_REG PORTC DEFINE CCP1_BIT 2 DEFINE LOADER_USED 1 ' Bootloader Define USE_LFSR 1 DEFINE ADC_BITS 12 DEFINE ADC_CLOCK 6 DEFINE ADC_SAMPLEUS 8 DEFINE Pulsin_MAX 18000 DEFINE I2C_SLOW 1 TRISA = %11111111 ' TRISB = %00111111 ' TRISC = %10111111 ' TRISD = %01100111 ' TRISE = %11111111 ' TRISF = %11111111 ' TRISG = %00000100 ' TRISH = %00111111 ' TRISJ = %00011100 ' ADCON2 = %10000110 ' Right justify 10 bit output, Clock = Fosc/64 ADCON1 = %00010101 ' Set Vref on RA3, 9 chan A/D (AN0-AN8) ADCON0 = %00000001 PSPCON = %00000000 ' No PSP MEMCON = %10000000 ' No External Memory CMCON = %00000111 ' No Comparator used, turn it off T0CON = %10001000 ' Timer0 ON, no prescaler 100nSec/Count CCPR1L = %00010000 CCPR1H = %00000000 ' Initialize to 0, PWM register PR2 = $7F ' PWM register,78 Khz@40Mhz, 9 bits T2CON = %00000100




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