How instant are Instant Interupts?


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  1. #1
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    Quote Originally Posted by jmgelba View Post
    ... I've never used a PIC timer or a ccp ...
    Then you won't want to do this.
    But here's what I was thinking in post#4 ...

    <img src="http://www.picbasic.co.uk/forum/attachment.php?attachmentid=3287&stc=1&d=123847625 4" /><!-- Name:  ZeroDelay.JPG
Views: 1330
Size:  23.5 KB -->

    This would be for Zero delay only, just to show the concept.
    But it only takes a couple changes to get full control (zero delay or interrupt timed, selectable).

    Some PIC's have a Gated Timer1 built into the chip. That would make the OSC config easier, and it wouldn't need the lower NAND gate.

    Zero Delay or Full Control, it still only takes one 74HC00, and the mode is selected by the PIC.

    Purely theoretical.
    <br>
    DT

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    Interesting. I had been looking at programmable and custom delay lines too. There are a couple out there that are mcu controllable but cost a fortune. 74HC00's do not!

    And, DT, I gotta try my hand at this for a couple of reasons.

    1. I'd like to pay next months mortgage.
    2. I'd stop asking you about timers and ccp's.

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    1. I'd like to pay next months mortgage.
    I thought everyone quit paying those things.

    2. I'd stop asking you about timers and ccp's.
    Now I'm confused, cause this would definitely generate more Timer/CCP questions.

    Or did you mean you'd try your hand at programmable and custom delay lines?
    <br>
    DT

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    Still barely paying my mortgage.

    If I figured out timers and ccp's, I would be one person less asking you questions (in the future.)

    As for now, yep, there'd be several questions I'm sure!

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    OK, then let me throw some fuel on the fire...

    <img src="http://www.picbasic.co.uk/forum/attachment.php?attachmentid=3293&stc=1&d=123853748 1" /><!-- Name:  ZeroDelay2.GIF
Views: 1649
Size:  12.7 KB -->

    This is the "Full control" version.
    I've connected the pulse input to the INT pin of the PIC, for the delayed pulses.

    The second input of the first NAND goes to another PIC pin (Zero Delay Enable).
    When that pin is HIGH, Zero Delay is selected and the output of the flip-flop will go high immediately on an incoming pulse.
    R1 keeps it disabled till the PIC takes over.

    Another pin is used to "Set from CPU".
    This is used to Set the output Flip-Flop manually from the PIC so it can respond to Delayed pulses timed by the interrupts. Taking the pin LOW will set the flip-flop. This should be tri-stated when in Zero Delay mode.

    Clearing the flip-flop (end of pulse width) is done with the CCP out pin. Whether it's actually the CCP doing it, or timed interrupts.

    Again, Purely theoretical.
    <br>
    DT

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    Quote Originally Posted by Darrel Taylor View Post
    OK, then let me throw some fuel on the fire...

    <img src="http://www.picbasic.co.uk/forum/attachment.php?attachmentid=3293&stc=1&d=123853748 1" /><!-- Attachment 3293 -->

    This is the "Full control" version.
    I've connected the pulse input to the INT pin of the PIC, for the delayed pulses.

    The second input of the first NAND goes to another PIC pin (Zero Delay Enable).
    When that pin is HIGH, Zero Delay is selected and the output of the flip-flop will go high immediately on an incoming pulse.
    R1 keeps it disabled till the PIC takes over.

    Another pin is used to "Set from CPU".
    This is used to Set the output Flip-Flop manually from the PIC so it can respond to Delayed pulses timed by the interrupts. Taking the pin LOW will set the flip-flop. This should be tri-stated when in Zero Delay mode.

    Clearing the flip-flop (end of pulse width) is done with the CCP out pin. Whether it's actually the CCP doing it, or timed interrupts.

    Again, Purely theoretical.
    <br>
    Hmm, how would one use this for falling edge trigger? I'll be honest, I havent had time to study what you are doing here, but what I've looked at seems logical.
    I just ordered a couple of quad nands and a few 40MHz resonators, and over the next week or so will have a chance to work with this.

  7. #7
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    Hmm, how would one use this for falling edge trigger?
    Several possibilities there.

    If using Option #1, the 4th NAND gate is available and can be used to invert the incoming signal. Selection of Normal/Inverted modes would then be with a Jumper or SPDT switch.

    If you wanted it to be selectable by the PIC, you could add a 74HC86 quad XOR. With the extra gates, you could put an XOR on the output too if you wanted the option to invert it from the PIC.
    <br>
    DT

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