Then you won't want to do this.
But here's what I was thinking in post#4 ...
<img src="http://www.picbasic.co.uk/forum/attachment.php?attachmentid=3287&stc=1&d=123847625 4" /><!---->
This would be for Zero delay only, just to show the concept.
But it only takes a couple changes to get full control (zero delay or interrupt timed, selectable).
Some PIC's have a Gated Timer1 built into the chip. That would make the OSC config easier, and it wouldn't need the lower NAND gate.
Zero Delay or Full Control, it still only takes one 74HC00, and the mode is selected by the PIC.
Purely theoretical.
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