How instant are Instant Interupts?

[Darrel Taylor]

555? Eeewwwww!
I think the minimum monostable time is around 2uS.

Actually, for the 0 delay, I was thinking you could do it with some 74HC NAND gates. A little tricky though.

By creating a SET/RESET flip-flop that gets toggled immediately on the incoming pulse, it can "gate" the FOSC/4 out signal into Timer1.

With a CCP module in COMPARE mode, you can load the delay time in CCPRxL:H prior to the pulses, and when it sees a match, it will output a pulse on the CCP pin which will reset the flip-flop, turning off the final pulse with great precision, and no software delay.

Interrupts will probably still be needed to reset things for the next pulse, but the actual task is done by hardware.
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[jmgelba]

No I'd never use a 555 timer but I though about something along the same lines. In the past, the way way past, I had a project that used some really high stability and acurate timing IC's. I think the part number began with Z.
Anyway, I do agree that hardware is the way to go for the 0 and 1uS delay.

I've never used a PIC timer or a ccp so this should be good for learning.

[Darrel Taylor]

... I've never used a PIC timer or a ccp ...

Then you won't want to do this.
But here's what I was thinking in post#4 ...

<img src="http://www.picbasic.co.uk/forum/attachment.php?attachmentid=3287&stc=1&d=123847625 4" /><!-- -->

This would be for Zero delay only, just to show the concept.
But it only takes a couple changes to get full control (zero delay or interrupt timed, selectable).

Some PIC's have a Gated Timer1 built into the chip. That would make the OSC config easier, and it wouldn't need the lower NAND gate.

Zero Delay or Full Control, it still only takes one 74HC00, and the mode is selected by the PIC.

Purely theoretical.
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[jmgelba]

Interesting. I had been looking at programmable and custom delay lines too. There are a couple out there that are mcu controllable but cost a fortune. 74HC00's do not!

And, DT, I gotta try my hand at this for a couple of reasons.

1. I'd like to pay next months mortgage.
2. I'd stop asking you about timers and ccp's.

[Darrel Taylor]

1. I'd like to pay next months mortgage.

I thought everyone quit paying those things.

2. I'd stop asking you about timers and ccp's.

Now I'm confused, cause this would definitely generate more Timer/CCP questions.

Or did you mean you'd try your hand at programmable and custom delay lines?
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[jmgelba]

Still barely paying my mortgage.

If I figured out timers and ccp's, I would be one person less asking you questions (in the future.)

As for now, yep, there'd be several questions I'm sure!

[Darrel Taylor]

OK, then let me throw some fuel on the fire...

<img src="http://www.picbasic.co.uk/forum/attachment.php?attachmentid=3293&stc=1&d=123853748 1" /><!-- -->

This is the "Full control" version.
I've connected the pulse input to the INT pin of the PIC, for the delayed pulses.

The second input of the first NAND goes to another PIC pin (Zero Delay Enable).
When that pin is HIGH, Zero Delay is selected and the output of the flip-flop will go high immediately on an incoming pulse.
R1 keeps it disabled till the PIC takes over.

Another pin is used to "Set from CPU".
This is used to Set the output Flip-Flop manually from the PIC so it can respond to Delayed pulses timed by the interrupts. Taking the pin LOW will set the flip-flop. This should be tri-stated when in Zero Delay mode.

Clearing the flip-flop (end of pulse width) is done with the CCP out pin. Whether it's actually the CCP doing it, or timed interrupts.

Again, Purely theoretical.
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