input logic threshold level for pic 16F628

[aratti]

Darel, the approch I am investigating is different. I am working on the possibility to have voltage to drop below the VIL when two or more column keys are pressed at the same time.
The branch with one diode work fine with Ra and Rb = 10K and R1=4.7K (one key = 1.06 Volts - two keys yield 0.5 Volts which should not trigger the interrupt) but naturally branches with more diodes in parallel will behave differently because partition Ra - Rb will be different and I need to find out which is the best compromise (if exists and if it works) for Ra Rb R1 R2 R3 and R4. ( See the attached diagram)

One way which protect only for two adiacent keypress is given in the second diagram where before decoding the key I could check if odd and even logic are high and invalidate the reading but is not enough

The very last solution is to use an additional component (a pretty old one) Cd4067 ( 4 to 16 line decoder) which solve definitly the problem and is working pretty well. (see 3rd diagram. This option suggested to me to use a pic 16F873 to avoid to use the additional CD4067).

I will investigate also your suggestion.

Al.