Thats Great Al! Love the follow thru!
I've been trying to figure out how that might work with the TTL levels.
I keep coming up with Butkis. But I could be missing the point.
The main problem I get hung up on it that pressing keys 1,1 and 1,2 at the same time, is electrically identical to pressing 1,3. And the problem repeats throughout the rest of the keypad.
<img src="http://www.picbasic.co.uk/forum/attachment.php?attachmentid=3073" /><!---->
So I figured they had to be different somehow, and that difference has to be readable on chips that don't have A/D. Like the 16F628 already in play.
I never like adding more parts, but I think they may help to decide if a keypress is valid or not in this case.
If the schematic looked something like this ...
<img src="http://www.picbasic.co.uk/forum/attachment.php?attachmentid=3077" /><!-- attach]3077[/attach] -->
Then all the rows can be set HIGH and when any key is pressed it should get a PORTB change interrupt as expected. And the key can also be read as planned.
But then, it can do some additional testing to look for double keypresses, by measuring RCTIME or equivalent capacitor discharge times.
The resistor R1 - R4 values would indicate how many diodes (bits) should have been read. Columns with 1 diode have the lowest value and should discharge fast. Columns with 2 diodes have a resistor that increases the RCTIME to indicate 2 bits. 3 diodes and 4 diodes per column have progressively larger resistors.
The idea is that if you receive a key with 3 bits = 1, then the RCTIME should also indicate 3-bits as a check/balance. Pressing any other keys simultaneously will give an incorrect "Check".
I haven't figured out any part values or code snippets since I'm not sure if the concept will work.
Maybe someone can see why it won't work, and we won't have to.
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