Voice Playback CHIP SD20


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  1. #1
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    Default Voice Playback Chip - SD20

    Attached Pages from datasheet 14-20.
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  2. #2
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    Default Voice Playback Chip - SD20

    Attached last of datasheet info: pages 21-26
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  3. #3
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    Default Voice Play Chip - SD20 - Construction Circuit.

    Here is a photo of my test circuit. Refer to page 22 from PDF document.

    Resistor network connected to CLK and DI pin in SD20 from PIC as follows:

    PortA.4
    |
    10K
    |
    10K
    |------ CLK - SD20 - P04
    10K
    |
    Gnd


    PortA.0
    |
    10K
    |
    10K
    |------ DI - SD20 - P05
    10K
    |
    Gnd

    '************************************************

    Code as follows; but can not get it to work; any help PLEASE ?????

    @ DEVICE XT_OSC,MCLR_OFF,LVP_OFF,WDT_OFF,PROTECT_OFF

    DEFINE LOADER_USED 1

    Include "Modedefs.Bas"

    ' ** Setup the Resonator Frequency, in Mhz **
    Define OSC 4

    ' DEFINE SHIFT_PAUSEUS 100

    ANSEL = 0 'Configure all pins to digital operation since not using ADC
    '(Analog to Digital Converter)


    Baud con 84 ' 9600 baud rate

    ' ** Port configurations **

    TX VAR PORTB.5
    RX VAR PORTB.2

    CLK VAR PORTA.4
    DI Var PORTA.0

    PIEZO VAR PORTB.7

    DAT VAR word


    Init:

    TRISA=%11111111 ' Set PortA TRIS register
    TRISB=%00000000 ' Set PortB TRIS register

    begin:

    low piezo
    high CLK
    high DI

    dat = $FFF7
    serout2 tx,baud,["1st Data = ",bin16 dat,13,10]
    Shiftout DI, CLK, 1,[dat/16]

    dat = $3
    serout2 tx,baud,["2nd Data = ",bin16 dat,13,10]
    Shiftout DI, CLK, 1,[dat/16]

    dat = $fffe
    serout2 tx,baud,["3rd Data = ",bin16 dat,13,10]
    Shiftout DI, CLK, 1,[dat/16]

    END
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