18F67J60 circuit for ethernet operation

[Kamikaze47]

Hi,

I realise that 18F67J60 dev boards are available to buy, but i've decided to make my own.

The 18F67J60 data sheet shows this circuit for ethernet operation:



So far I have:

- An 18F67J60 soldered to a break-out board with all the required caps and OSC.
- I butchered an old PCI network card which gave me a handy bit of the circuit ready to use:



Ive been finding it hard to locate the other components like the odd valued resistors and the ferrite bead. The only places that seems to have these resistor values (at least here in Australia) is wholesalers who want me to order 100 minimum.

And the data sheet has very little information about what is required for the ferrite bead. In fact, the only specification I can see is that it should be rated for at least 80mA. Does this mean that any ferrite bead above 80mA should be fine? There seems to be ones with lots of different inductances, impedances and frequencies.

Has anyone had experience with building ethernet circuits that may have some advice?

[rhino]

Has anyone had experience with building ethernet circuits that may have some advice?

You might tap Fred Eady for advice. He has posted here before.

[linhepu]

excuse me. i'm not good english. but i have one question : why The internal analog circuitry in the PHY module requires that an external resistor (2.26 k) be attached from RBIAS to ground. how uses this value
please help me! (

[Archangel]

excuse me. i'm not good english. but i have one question : why The internal analog circuitry in the PHY module requires that an external resistor (2.26 k) be attached from RBIAS to ground. how uses this value
please help me! (

The resistor influences the TPOUT+/-
signal amplitude.Read the Data sheet 19.1.4 it tells there.