16F684 adcin and hpwm

[astouffer]

What I'm trying to do is rewrite this ASM code into Basic

http://hades.mech.northwestern.edu/w...M_Motor_Driver

It works as described but I need to add more options and conditions. The hardest part is getting this pwm part working.

[mister_e]

NO NEED FOR HPWM then

INIT_PWM
	BANK0
	MOVLW	B'10001100'			;Dual-Output, Half-Bridge Mode
	MOVWF		CCP1CON			;P1A,P1C active-high, P1B,P1D active-high
	MOVLW	B'00000100'			;Timer2 enabled with prescale 1
	MOVWF		T2CON
	BANK1
	MOVLW	0xFF
	MOVWF		PR2				;Set frequency to 19.53 kHz
	BANK0
	MOVLW	B'01111111'			;50% duty cycle
	MOVWF		CCPR1L	
	RETURN

UPDATE_PWM
	BANK0
	MOVFW	ADRESH			; copy the 8 MSbs to the CCPR1L register
	MOVWF	CCPR1L
	BTFSC	ADRESL,7		; is ADC bit 1 set?
	BCF		CCP1CON,5		; if not, clear the PWM bit 1
	BSF		CCP1CON,5		; if so, set the PWM bit 1
	BTFSC	ADRESL,6		; same thing, for bit 0
	BCF		CCP1CON,4
	BSF		CCP1CON,4	

	RETURN

Think about it a little bit

[astouffer]

Got it working. Heres the code:

DEFINE FOSC 100
DEFINE ADC_BITS 10 ' Set number of bits in result
DEFINE ADC_CLOCK 3 ' Set clock source (3=rc)
DEFINE ADC_SAMPLEUS 50 ' Set sampling time in uS
OSCCON = %01100001 '4 Mhz

TRISA = %11111111 ' Set PORTA to all input
ADCON1 = %10000010 ' Set PORTA analog and right justify
output portc.5

adcVar VAR word
dutyCycle var byte


main:
ADCIN 0, adcVar
dutyCycle = adcVar/256
hpwm 1,dutyCycle,6000
goto main

[anonymouse]

Got it working. Heres the code:

DEFINE FOSC 100
DEFINE ADC_BITS 10 ' Set number of bits in result
DEFINE ADC_CLOCK 3 ' Set clock source (3=rc)
DEFINE ADC_SAMPLEUS 50 ' Set sampling time in uS
OSCCON = %01100001 '4 Mhz

TRISA = %11111111 ' Set PORTA to all input
ADCON1 = %10000010 ' Set PORTA analog and right justify
output portc.5

adcVar VAR word
dutyCycle var byte


main:
ADCIN 0, adcVar
dutyCycle = adcVar/256
hpwm 1,dutyCycle,6000
goto main

word filled by 10bit, result divided by 256?

[astouffer]

word filled by 10bit, result divided by 256?

Would it make more sense to sample 8 bits? Without dividing by 256 one full turn of the pot repeats 0-100% duty cycle many times. I admit being new to the world of programming and working with the internals of microprocessors.

[mister_e]

Well yes and no. Yes if you're using HPWM, no if you set the CCP register yourself as in the ASM code.

One thing is sure, 10 bits/256, will not give you a 8 bit results... if you divide it by 4... yes.