18F4550 Not Recognised

[Bruce]

A 20MHz crystal is fine as long as you set the proper config word options.

Below are my config settings for the 18F4550 from my 18F4550.INC file in my
PBP directory. I have edited the default settings in this PBP header file for
the 18F4550 to be compatible with the Microchip USB boot-loader.

        NOLIST
    ifdef PM_USED
        LIST
        "Error: PM does not support this device.  Use MPASM."
        NOLIST
    else
        LIST
        LIST p = 18F4550, r = dec, w = -311, f = inhx32
        INCLUDE "P18F4550.INC"	; MPASM  Header
        CONFIG PLLDIV=5,CPUDIV=OSC1_PLL2,USBDIV=2,FOSC=HSPLL_HS,FCMEM=OFF,IESO=OFF
	CONFIG VREGEN=ON,CCP2MX=ON,WDT=OFF,WDTPS=32768,PBADEN=OFF,PWRT=OFF,MCLRE=ON
	CONFIG LPT1OSC=OFF,BOR=ON,BORV=2,STVREN=ON,LVP=OFF,ICPRT=OFF,XINST=OFF,DEBUG=OFF
	CONFIG WRTB=ON
        NOLIST
    endif
        LIST
EEPROM_START	EQU	0F00000h
BLOCK_SIZE	EQU	32

PLLDIV=5 ' This sets the PLL Postscaler to divide the primary osc input by 5
providing 4MHz to the 96MHz PLL. The 96MHz PLL input must always be 4MHz
as shown in the data sheet.

CPUDIV=OSC1_PLL2 ' This sets the PLL Postscaler to divide the 96MHz PLL
output by 2 providing a 48MHz clock to the CPU.

USBDIV=2 ' This divides the 96MHz PLL output by 2 providing 48MHz to the
USB core.

FOSC=HSPLL_HS ' This enables HSPLL for high-speed crystal/resonator.

If you plan to use the Microchip USB boot-loader with PBP, then insert this in
the top section of your code;

DEFINE OSC 48 ' 20MHz crystal with HSPLL enabled = 48MHz
DEFINE RESET_ORG 800h ' Reset Vector = 800h When Using Microchip USB Boot-Loader

[Funky Gibbon]

Thanks Bruce, i shall give it a try and let you know what happens

Shaun