System Wide Clock?

Hello everyone, I currently have a design using 7 16F pics each performing time specific tasks.
All pics are running at 20MHz. The question is would it be to any advantage to sync all the processors from a single clock source? If so, does anyone have any recommendations on a clock driver/distributor.

Thanks

SOMRU

Have you seen this? Post #3
http://www.picbasic.co.uk/forum/show...=multiple+pics

Thanks Dave, I searched the forums but must have used the wrong nomenclature, as usual. THANKS AGAIN
SOMRU

Just happened to remember reading it when it was live.

Greeting all, been busy.

I have connected a 16f871 clko to a 16f870 clki, all seemed well.
Connected the 870 clko to a 16f818 clki, as per:

Method 2.

Connect OSC2 from the PIC1 with the Crystal, to OSC1 of PIC2 without. PIC2's OSC2 connects to PIC3's OSC1. PIC3's OSC2 connects to PIC4's OSC1... ad infinitum... Disadvantage: If one of the PICs failed, all the PICs down the chain from that PIC will cease operating also.


Results not so good. The 818 is not running, and have two more pics to drive.

O-scope shows a dc offset and diminishing low side, as it goes down the line.

Has anyone any ideas???

Thanks

Ensure you have HS Oscillator set in Config Fuses of all your PICs - this increases the drive levels and also allows you fan-out to more than one PIC down the line.

Good morning,
Yes all pics are set to HS, double checked I/O's.
Oscillators defined at 20 MHz.
I will check board for ground leakage on that net.
Thanks for the quick response.
This forum is BRILLIANT!!

Good Afternoon,
Rerouted clock signal in several different configurations, serial/parallel and can still only get 3 of the five to roll. Am able to swap the last three around on end of run, same-same diag program and I/O, same results.
Went as far to hard wire the clock signals off board to eliminate stray capacitances.
Well.....
Back to the bench.
Should the the clock signal have the same voltage all the way down the line?? I would think so.
Going to replace crystal, caps, and main pic next.

Close but not quite ready for the BFH.

Well the BFH "Bottle of Fermented Hops" didn't hurt or help. But was enjoyable.

I gave in guys...

Tacked on some crystals and caps, trimmed some traces, and I'm up and running.

Started out with 20Mhz @ 4v PK2PK. Was getting about 1v drop for each pic in series or parallel. The pics start failing at 2.8v pk2pk.

I will not let this drop. I am just on a really tight schedule.

Thanks for the help so far.

You can use a 74HC04 to distribute clock signal.
Like in this schematic:
http://www.picbasic.co.uk/forum/atta...4&d=1060366548
there is two pics, only one clock. More pics could be added.

thanks...

Possibly in the "NEXT GENERATION" upcoming.

How much SNYCH is really needed?
Not much for this application. But need for a solid timing freq is.


THANKS AGAIN