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In the communications portion of the forum, I2C is mentioned as being part of that section, but there's no particular I2C forum.
Here's my I2C question:
On the PIC 18F4550, pins 33 and 34 are the SDA and SCL pins for I2C communication. They work fine. Can I implement another I2C device on another set of pins, say RC2 and RD7, as long as I specify those pins in the I2CRead and I2CWrite commands?
Yes yes yes. If you're using I2CREAD, I2CWRITE you use a software solution, not the hadware solution as many seems to think...like SERIN vs HSERIN. Being said you can also use I2CREAD on a PIC16F84 wich don't have any MSSP module and it will work.
PBP allow to use as many I2C bus you need.
Blaine,
Part of I2C's features is 2 lines (SCL & SDA) creating a bus which can handle multiple slaves & masters.
Also, I know Phillips (as well as others certainly) makes a number of chips which enhance the protocal and extend the bus in many ways? Capacitance on the lines needs to be taken into account, but there are ways to deal with that too.
So, what are you trying to do that requires more than one bus? Do you really need it? It could save a few pins if you don't have to have a second bus.
Steve
Possibly not.
The 24LC16B memory chip doesn't appear to allow you to use multiple chips. I would be using this chip, or some other memory chip, as message queues to external systems. If I can't have more than one memory chip on this bus, then multiple busses is an option.
Here's a scenario that it might make sense: I have two different chips sharing memory, say a PIC and an Ethernet chip. While the Ethernet chip is writing to memory, the bus is busy, so the PIC can't access it, or anything else on that bus. If there were a second bus, say a RTC and one or more sensors, the PIC could access that bus and get info at the same time the Ethernet chip is writing to the memory.
This project is in its early design phases, and I'm trying to keep my options open while I explore the pros and cons.
A part # on the bus enhancement chip(s) would be useful for my research.
Thanks for your input!
bcf
Looking at the datasheet, you are correct. The "address pins" are not used on this chip. But, if you are still in the design stage, the 24LC32B chips do allow for up to 8 seperate chips on the bus. Just a possibilty. (EDIT: This is, 8 seperate 32B Chips. Even with the 16B chips, you could have a RTC, ADC, whatever, as long as the first 4 bits (MSB) of the address for the other chips are different)Quote:
The 24LC16B memory chip doesn't appear to allow you to use multiple chips.
Well, in this case, the PBP software I2C is not a good choice for multimaster situation. If the PIC has hardware I2C that supports multimaster, that might be used. Unless one master was dominating access to the bus and kept it very busy with long data exchanges, you still could probably do with just one one bus, as the wait for the bus to be free should not take long.Quote:
I have two different chips sharing memory, say a PIC and an Ethernet chip.
Take a look here. This should give you a idea of what is available. I have used a bus-extender (P82B715) for long distances with good success.Quote:
A part # on the bus enhancement chip(s) would be useful for my research.
Finally, as mister_e already stated, you can have as many PBP I2C buses as you have pairs of IO pins. If you aren't short of IO pins, why not:). Also, if your PIC has a harware I2C, you can use that as well (much faster than PBP "bit-banged" bus BTW).
Steve