Timing of heartbeat LED is off

Migrated my test code from a 18F26K22 (max 3Kohm impedance on ADC) to a 16F1937 (max 10K).
Datasheet: https://ww1.microchip.com/downloads/...ets/41364E.pdf
32 MHz internal clock is on page 74

I tried a gazillion permutations of the clock settings but I can't seem to get it to blink ON at 1 second intervals.

Pause 15 takes about 1 second from ON to ON. :confused:

Code:

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#CONFIG
 __CONFIG _CONFIG1, _FOSC_INTOSC & _WDTE_OFF & _PWRTE_ON & _MCLRE_ON & _CP_OFF & _CPD_OFF & _BOREN_OFF & _CLKOUTEN_OFF & _IESO_OFF & _FCMEN_OFF
 __CONFIG _CONFIG2, _WRT_OFF & _VCAPEN_OFF & _PLLEN_ON & _STVREN_OFF & _BORV_LO & _LVP_OFF
#ENDCONFIG
DEFINE IRCF = %1110                ' to enable 8 MHz
DEFINE SCS = %00                    ' system clock determined by FOSC
DEFINE OSC 32
'DEFINE TUN = %000000
ANSELA = %00000000
ANSELB = %00000000
ANSELD = %00000000
ANSELE = %00000000
TRISA = %00000000
TRISB = %00000000
TRISC = %00000000
TRISD = %00000000
TRISE = %00001000  ' E3=MCLR
LEDblink    var    PORTB.5
    LEDblink = 0
Mainloop:
    if ledblink = 0 then
        LEDblink = 1
    else
        LEDblink = 0
    endif           
    Pause 15
    goto mainloop
end

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I bow in humbleness and await the appropriate mockery.
:D

Quote:

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DEFINE IRCF = %1110 ' to enable 8 MHz
DEFINE SCS = %00 ' system clock determined by FOSC

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none of which are known PBP defines

which means that the chips osc is running with POR values
what are the POR values
Attachment 9706

fosc= 0.5 MHz

osccon = ( IRCF << 3) | SCS

might work

First off, you should use CON to define a numeric constant instead of DEFINE

Next, since the intosc defaults to 500KHz at startup, that's outside the range of the 4xPLL which is spec'd from 4MHz-8MHz.
While it might work, I'd leave the CONFIG setting for the PLL off and enable it when you change the osc freq

Something like this should work:

Code:

---

#CONFIG
 __CONFIG _CONFIG1, _FOSC_INTOSC & _WDTE_OFF & _PWRTE_ON & _MCLRE_ON & _CP_OFF & _CPD_OFF & _BOREN_OFF & _CLKOUTEN_OFF & _IESO_OFF & _FCMEN_OFF
 __CONFIG _CONFIG2, _WRT_OFF & _VCAPEN_OFF & _PLLEN_OFF & _STVREN_OFF & _BORV_LO & _LVP_OFF
#ENDCONFIG

DEFINE OSC 32
' OSCCON register settings
SPLLEN CON %1          ' PLL enable
IRCF  CON %1110        ' to enable 8 MHz
SCS    CON %00          ' system clock determined by FOSC

OSCCON = (SPLLEN<<7) | (IRCF<<3) | SCS

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Thanks guys. I've been away for far too long.

Tumbleweed's code worked on the first try. :cool: