Hi guys is it possable to generate PWM with output in 25ns - 70ns timing on 18F26k22 ?
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Hi guys is it possable to generate PWM with output in 25ns - 70ns timing on 18F26k22 ?
its not a question that can be answered unless you state the pwm period and the pwm resolution required along with fosc
Quote:
PWM Period = PRx + 1 4 TOSC (TMRx Prescale Value
I cant get the duty cycle formula to paste into this properly , its in the data sheetQuote:
Pulse Width = CCPRxL:CCPxCON<5:4> T OSC (TMRx Prescale Value)
hI RICHARD ,
thinking 64mhz internal , with a 25ns - 70ns pulse , with a off time of about 30ns
output drive a high speed Mosfet driver chip
@64Mhz every clock cycle is 15.6 nS you could in theory have 2bit pwm
70nS+30nS /15.6=5
mmm have you ever tried to get a pwm at such a speed and it work reliably richard ?
it even tricky on a 800mhz raspberry pi
http://www.raspberrypi.org/forums/vi...p?f=72&t=67741
maybe
MAX9471/MAX9472 clock generator
That is more RF circuitry than digital...
To get square wave at that speed you are talking about frequency components of tens of MHz, at least... You must use transmission lines, matched source and load to get it working.
And that isn't PWM because you have fixed off time. So it's variable frequency with constant off time. You can check out constant on time DC/DC for ideas, just invert output.
If I was doing that, I'll try create something like NE555 with LTC1394, fixed OFF time, and adjustable current source for charging on time capacitor...
You can find some ideas in Linear AN94 for delay circuit.
So use pic just to adjust charging current.
EDIT:
Just replace R1 with variable constant current
http://www.electronics-tutorials.ws/waveforms/tim47.gif
And build NE555 on steroids...
Then ON time depending linearly on C and current. Off depending on R2 and C.
yes i have done a 555 at 100ns , and used the inverter and resister / cap arrangement to produce a 30ns time , with a about 200ns space between , other way i just use a powered xtl with buffer and programaable counter for speed changes in multipuls for the base xtl , but its not about how to make the pulse from other parts
i have used the 64mhz clockref out pin from these chips though an external buffer to clean up the waveform but i not sure if i can use that approch as an input for the hpwm and its control ?? and still get it to work
With a datasheet stating 3 MHz as a max frequ ??? ... and moreover with rise time OR fall time @ 100 ns ... ???Quote:
Originally Posted by longpole001
Hum, hum ...
Alain
it was to trigger a laser pulse at 30 ns , and am looking at how i can do this from pic
@64 MHz 1 clock = 15.6 ns , 1 instruction 62.4 ns . its not going to fly
http://www.jensign.com/opto/ledlaserdrivers/index.html
using the hand drawn image - as test for laser driver
ok thanks richard
Hmmm, actually, in PWM mode the CCP module is run from TMR2 which is concatenated with the two bits from the internal clock divider (which is where the "extra" bits of resolution comes from) so each "dutycycle bit" represents one TOsc - not four. From the 18F25K22 datasheet;So with a 64MHz oscillator it should be possible to generate 15.625ns pulses using the CCP module.Quote:
PulseWidth = CCPRxL : CCPxCON<5:4> * TOsc * TMRxPrescaler value
/Henrik.
any code worth putting into the 18f67k22 i have on hand hendrick , i am assuming the simple commands wont cut it and the registers need to be setup to make use of it ?
Code:
define HPWM4_TIMER 2 ' HPWM4 TO USE TIMER 2
hpwm 4 ,xx ,xxx 'CPP4 Wduty , freq
as I stated in post 4 for the range of pulses you specified the pwm resolution is very limited
0b000 = 0ns
0b001=15.6ns
0b010=31.2 ns
0b011=46.8 ns
0b100=62.4 ns
0b101= over range
and as pedja089 stated a fixed 30ns deadtime means hpwm will not cut it / the period reg will need to be changed with every change in pulse width to maintain the dead time
ok ill give it try and see ,
pulsewidth var byte ; 0 -5 max is 5
ccp1con=12; pwm mode active high
pr2= pulsewidth+2
ccpr1l=pulsewidth.2
ccp1con= 12+ ((pulsewidth&3)<<4) ;low bits and set the pwm
if you change the pulsewidth you must change pr2 and ccpr1l also
don't expect the output to propagate far without severe deformation
note that 74series gates have propagation delays of 90ns and 20ns rise/fall times ,74f is better at 8 and 3 . ecl would be better still
ps needless to say the tris bit for the output must be cleared
you will need a good cro to measure this 200mhz+ to get a good look
ok thanks richard , i have 74f's on hand , and 200mhz cro
has anyone used a standalone PWM chip interfaced back to a pic for this , i know the dsPIC33F support a high speed PWM unit , but that not any good when using PBP
Have you looked at the 16F1786, it has a 16bit PWM that can run at 64MHz
Now that is one cool chip.
16bit PWM with a boatload of modes and complementary outputs, 12bit ADC with differential inputs, 8bit DAC, 2 opamps, 4 comparators + the all the usuall stuff - and IOC on all pins, individual pullups.
As far as I can see though, the max operating frequency is 32MHz.
I'll make sure to include a couple in my next Digikey order.
Thanks Marv!
yes its 32mhz from what i can see.
Max operating frequency is 32MHz, but the PWM can operate at 64MHz.
From the data sheet:
24.2.5 PSMC TIME BASE CLOCK
SOURCES
There are three clock sources available to the module:
• Internal 64 MHz clock
• Fosc system clock
• External clock input pin
Interesting.Quote:
Originally Posted by HenrikOlsson
Am I right in believing that it is better to move towards 18F because 16F are an older generation and most likely to be retired "eventually"?
Robert