Help with Pic-18F23K22

Hi ,

I want to use 18F23K22 device in my proyect , after a lot of time reading the datasheet and Melabs configurator can't get blink a simple led with this device, maybe someone can give me help to find the mistake in my code.


Here the code:

#CONFIG
CONFIG FOSC = HSMP ; HS oscillator (medium power 4-16 MHz)
CONFIG PLLCFG = OFF ; Oscillator used directly
CONFIG PRICLKEN = ON ; Primary clock enabled
CONFIG FCMEN = OFF ; Fail-Safe Clock Monitor disabled
CONFIG IESO = OFF ; Oscillator Switchover mode disabled
CONFIG PWRTEN = OFF ; Power up timer disabled
CONFIG BOREN = SBORDIS ; Brown-out Reset enabled in hardware only (SBOREN is disabled)
CONFIG BORV = 190 ; VBOR set to 1.90 V nominal
CONFIG WDTEN = OFF ; Watch dog timer is always disabled. SWDTEN has no effect.
CONFIG WDTPS = 32768 ; 1:32768
CONFIG CCP2MX = PORTC1 ; CCP2 input/output is multiplexed with RC1
CONFIG PBADEN = OFF ; PORTB<5:0> pins are configured as digital I/O on Reset
CONFIG CCP3MX = PORTB5 ; P3A/CCP3 input/output is multiplexed with RB5
CONFIG HFOFST = ON ; HFINTOSC output and ready status are not delayed by the oscillator stable status
CONFIG T3CMX = PORTC0 ; T3CKI is on RC0
CONFIG P2BMX = PORTB5 ; P2B is on RB5
CONFIG MCLRE = EXTMCLR ; MCLR pin enabled, RE3 input pin disabled
CONFIG STVREN = ON ; Stack full/underflow will cause Reset
CONFIG LVP = OFF ; Single-Supply ICSP disabled
CONFIG XINST = OFF ; Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
CONFIG DEBUG = OFF ; Disabled
CONFIG CP0 = OFF ; Block 0 (000200-000FFFh) not code-protected
CONFIG CP1 = OFF ; Block 1 (001000-001FFFh) not code-protected
CONFIG CPB = OFF ; Boot block (000000-0001FFh) not code-protected
CONFIG CPD = OFF ; Data EEPROM not code-protected
CONFIG WRT0 = OFF ; Block 0 (000200-000FFFh) not write-protected
CONFIG WRT1 = OFF ; Block 1 (001000-001FFFh) not write-protected
CONFIG WRTC = OFF ; Configuration registers (300000-3000FFh) not write-protected
CONFIG WRTB = OFF ; Boot Block (000000-0001FFh) not write-protected
CONFIG WRTD = OFF ; Data EEPROM not write-protected
CONFIG EBTR0 = OFF ; Block 0 (000200-000FFFh) not protected from table reads executed in other blocks
CONFIG EBTR1 = OFF ; Block 1 (001000-001FFFh) not protected from table reads executed in other blocks
CONFIG EBTRB = OFF
#ENDCONFIG
DEFINE OSC 4
OSCCON.0=0 'System Clock Primary Select Clock bit 0
OSCCON.1=0 'System Clock Primary Select Clock bit 1
CM1CON0.7=0 'Comparator 1 Off
CM2CON0.7=0 'Comparator 2 Off
ADCON0.0=0 'ADON:ADC Enable bit disabled
ANSELA=%00000000 'PortA Digital
ANSELB=%00000000 'PortB Digital
ANSELC=%00000000 'Portc Digital
INTCON=%00000000 'Disable All Interrupts
INTCON2.7=1 'PortB Pull Up Disabled
WPUB=%11000000 'Single PortB Pull Up PORTB0~PORTB7 enabled
TRISA=%00000000 'PortA All Output
TRISB=%00000000 'Portb All Output
TRISC=%00000000 'PortC All Output

LED1 VAR PORTC.0

MainLoop:

HIGH LED1
PAUSE 500
LOW LED1

Goto Mainloop

end

try the pbp3.x standard profile for the chip as a start point to see what you get

the file is found
C:\Program Files (x86)\PBP3\DEVICE_REFERENCE\ PIC18F23K22.INFO

What does the led look like? Does it look like it is on all of the time? I see no pause after turning it off. I would put a PAUSE 500 after the LOW LED1 statement.

Quote:

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Originally Posted by Dave

What does the led look like? Does it look like it is on all of the time? I see no pause after turning it off. I would put a PAUSE 500 after the LOW LED1 statement.

---

First of all thank to longpole001 and Dave for reply.

Before this post I read the datasheet of PIC18F23K22, the device.info, use melabs config and,try the same code with the rest of three devices purchased few days ago with no result seems like no powered microcontroller. I think make a mistake somewhere in the code but can't see where.The experimenter board used, have no faults on power, vcc decouple or mclr, xtal etc. I used this board many times on other proyects.


Alex

if you going to run it a 4mhz

then
CONFIG FOSC = INTIO67 instead of CONFIG FOSC = HSMP


and
OSCCON =$50

and
MainLoop:

HIGH LED1
PAUSE 500
LOW LED1
PAUSE 500 as dave said

Goto Mainloop

Quote:

---

Originally Posted by richard

if you going to run it a 4mhz

then
CONFIG FOSC = INTIO67 instead of CONFIG FOSC = HSMP


and
OSCCON =$50

and
MainLoop:

HIGH LED1
PAUSE 500
LOW LED1
PAUSE 500 as dave said

Goto Mainloop

---

Thank for reply Richard ,

You are right , i used the default configuration and the led blink now , but as you can see this is a simple example. I want to use an external Xtal osc at 20 Mhz and from this point tried read the datasheet again for get the device working with external Xtal and frequency that i need .

Thanks a lot ,

Regards

Alex

for ext 20mhz xtal
CONFIG FOSC = HSHP
OSCCON=0

Quote:

---

Originally Posted by richard

for ext 20mhz xtal
CONFIG FOSC = HSHP
OSCCON=0

---

Hi Richard ,


I use the following configuration in my Project for use only Primary Xtal Oscillator > 16 MHz

#CONFIG
CONFIG FOSC = HSHP ; HS oscillator (high power > 16 MHz)
CONFIG PLLCFG = OFF ; Oscillator used directly
CONFIG PRICLKEN = OFF ; Primary clock can be disabled by software
CONFIG FCMEN = OFF ; Fail-Safe Clock Monitor disabled
CONFIG IESO = OFF ; Oscillator Switchover mode disabled
CONFIG PWRTEN = OFF ; Power up timer disabled
CONFIG BOREN = SBORDIS ; Brown-out Reset enabled in hardware only (SBOREN is disabled)
CONFIG BORV = 190 ; VBOR set to 1.90 V nominal
CONFIG WDTEN = ON ; WDT is always enabled. SWDTEN bit has no effect
CONFIG PBADEN = OFF ; PORTB<5:0> pins are configured as digital I/O on Reset
CONFIG MCLRE = EXTMCLR ; MCLR pin enabled, RE3 input pin disabled
CONFIG DEBUG = OFF ; Disabled
CONFIG CP0 = OFF ; Block 0 (000200-000FFFh) not code-protected
CONFIG CP1 = OFF ; Block 1 (001000-001FFFh) not code-protected
CONFIG CPB = OFF ; Boot block (000000-0001FFh) not code-protected
CONFIG CPD = OFF ; Data EEPROM not code-protected
CONFIG WRT0 = OFF ; Block 0 (000200-000FFFh) not write-protected
CONFIG WRT1 = OFF ; Block 1 (001000-001FFFh) not write-protected
CONFIG WRTC = OFF ; Configuration registers (300000-3000FFh) not write-protected
CONFIG WRTB = OFF ; Boot Block (000000-0001FFh) not write-protected
CONFIG WRTD = OFF ; Data EEPROM not write-protected
CONFIG EBTR0 = OFF ; Block 0 (000200-000FFFh) not protected from table reads executed in other blocks
CONFIG EBTR1 = OFF ; Block 1 (001000-001FFFh) not protected from table reads executed in other blocks
CONFIG EBTRB = OFF ; Boot Block (000000-0001FFh) not protected from table reads executed in other blocks
CONFIG WDTPS = 32768 ; 1:32768
#ENDCONFIG


DEFINE OSC 20 ' 20MHZ crystal
OSCCON=%00001000 ' PRIMARY CLOCK DETERMINED BY FOSC<3.0> IN CONFIG 1H




Regards,


Alex

OSCCON.3 is a read only bit indicating Oscillator Start-up Time-out Status

OSCCON=0 is the correct option

Just curious, why not use internal osc on 18F PIC?

I do it all the time, works great even up to 64MHz on 18F4xK22 series

Robert

Quote:

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Originally Posted by Demon

Just curious, why not use internal osc on 18F PIC?

I do it all the time, works great even up to 64MHz on 18F4xK22 series

Robert

---

Hi Robert thank you for reply.

This is my first time using 18F series and choose this because only 28-pin dip and need work with two EUSART at high baud rates at the same time. Reading the datasheet sections 2.73 & 2.73.1 related to frequency drift and compensating with EUSART changes on OSCCON TUN<5:0> for adjust the clock frequency may be required.

I like to know how OSCCON TUN work and and how to get 20Mhz clock.


Regards


Alex

Hi Richard ,

Thanks a lot , i get the internal and external clock work correctly.:smile:

Regards

Alex

OSCTUNE will only adjust the internal osc and then only a few percent up/down . it will have no effect on an external crystal

if you find PicMultCalc by misterE you can find correct usart settings and % baudrate timing error for any osc speed .
as demon indicated more speed is good , why not engage the pll and run at 64mhz and save two pins too.
I was thinking the only good reason for a 20mhz rock was to engage the pll and run at 80mhz or maybe to simplify some timing calculations, but just for baudrate stability no way

Richard

if a 20mhz xtl was on a 18F23k22 and the PPL was used , can that cpu actually run at 80mhz ?? , thought the cpu speed limit was set at 64mhz , as well as PBP at 64mhz , and the largest xtl supported was 16mhz ??

cheers
sheldon

you're right the specs say 64mhz max , but you can always have a go and see what happens

Guys have overclocked PICs, but Microchip can't guarantee stability.

Pretty sure 64 is the highest for this PIC.

Robert