Adc on 18f67k22

Adc on 18f67k22 - an4

hi guys , in the process of porting code to 18F67K22 and need some input on the ADC setup for AN4 input ,

The code worked prior to porting to the chip so its goto be a register / setting not quite right , so if anyone can advise

The adc setup of AN4 is shown , for what i think is correct for all the other registers that may effect the input pin.
at the moment i get no reading at all

the osc is set to 32mhz internal
a Voltage divider resistor is on AN4 input

AVDD = 3.3v
AVSS = GND
Regards

Sheldon

Code:

HLVDCON = $00 'Turn off HIGH /LOW Voltage Detect Module T1CON = %01110100 ' Timer 1 ,bit7-6 = TMR1 CLK source 00 = Instuction Clk(Fosc/4),01 =sys clk,10=ext clk,11=cap sense osc ' bit5-4 = TMR1 prescale 11= 1:8 ,bit3=0 LP off,bit2=1 no sync ext CLK ,bit1= 0 n/a,Bit0=0 Timer 1 on/off T1GCON = %00000000 ' Timer 1 Gate Control bit7 0= counts regardless of gate 1 = gates in use , bit6 gate active when 1= High ,0=low ' bit5 0= toggle mode diabled 1= enabled bit4 single pulse mode 1- en 0= dis, bit 2 -status bit,1-0 - gate source sel T3GCON = $00 ' Timer 3 Gate disable DEFINE OSC 32 ' Timing referance for pause , pauseus commands DEFINE ADC_BITS 12 ' Number of bits in ADCIN result - Required for adcin command DEFINE ADC_CLOCK 5 ' fosc/32 0.8uS @ 32Mhz DEFINE ADC_SAMPLEUS 20 ' ADC sampling time in microseconds - Required for adcin command ' ------- Setup port A Variables & directions ---------- ANCON0.0 = 0 ' Set PortA:0 Analog / Digital allocation - 0 = digital ,1 analog - ANSEL0 ANCON0.1 = 0 ' Set PortA:1 Analog / Digital allocation - 0 = digital ,1 analog - ANSEL1 ANCON0.2 = 0 ' Set PortA:2 Analog / Digital allocation - 0 = digital ,1 analog - ANSEL2 ANCON0.3 = 0 ' Set PortA:3 Analog / Digital allocation - 0 = digital ,1 analog - ANSEL3 ANCON0.4 = 1 ' Set PortA:5 Analog / Digital allocation - 0 = digital ,1 analog - ANSEL4 Set RA5 (AN4/ ANSEL4) to be analog input for V-Mon TRISA = %00100000 ' setup Port A input=1,output=0 for I/O pins , set input for RA5 PORTA = %00100000 ' Clear Outputs ' ------------ADC Settings , routines and Varaiables ---------------- ' note: ADCON0 - channel selection done in routines using the required channel ADCON1 = %00000000 ' bit 7-6 = TRIGSEL 11= triger from RTCC, 10 = trigger from timer1 ,01 = trigger from CTMU, 00= trigger from ECCP2 ' Bit 5-4 - VCFG+ 11= Internal VREF+(4.096v) ,10= Internal VREF+ (2.048v) 01=External VREF+ ,00= AVDD ' Bit3 - VNCFG- 1= External Vref- , 0= AVSS Vref/A , ' Bit 2-0 = Analoge Neg Ch Select ( Differential measurement ) ' 111 = AN6, 110 = AN5, 101 = AN4,100 = AN3,011 = AN2, 010 = AN1, 001 = AN0,000 = AVSS, ADCON2 = %10101010 ' bit 7 = 1 ADFM ( ADRESH, ADRESL - right justify ) , Bit6 n/a , ' Bits 5-3 ACQT ( acquision time ) 111 = 20TAD ,110=16TAD,101-12TAD,100=8TAD,011=6TAD,101=4TAD,001=2TAD,000=0TAD ' Bit 2-0 ADCS ( AD clock sel) x11 =FRC , 110=Fosc/64,101= FOSC/16 ,100=FOSC/4 ,010=FOSC/32 ,001=FOSC/8, 000=FOSC/2 Value Var Word ' ADC varable for result '------------------------------------------------------- Get_volts : ADCON0 = %00010001 ' bit 7 -N/A , Bit 6-2 = ADC chan Sel /Tempature output /FVR output = AN4 sel = 00100 , ' Bit 1 - Go/_done status flag - 1 = Go do ADC / 0 = Done ADC , Bit 0 = Enable ADC = 1 / 0 = Disable ADC ADCIN 4 ,Value ' Leave out for Rev 2 of 16F1947 - Read PortA.5 value into variable , this applies the fixed voltage ref (via ADCON0,ADCON1,FVRCON) write $10, Value.HighByte ' debug write$11, Value.LowByte ' debug return

Re: Adc on 18f67k22 - an4

Just a quick read of the datasheet shows the maximum internal oscillator is 16MHz.

Also, the chip has an onboard voltage regulator for 3.3VDC so I'm certain you'd have to supply somewhat more than that to actually get that voltage to the chip. Although it does say it will operate at 1.8 volts.

Not sure it matters but on the write to the value.lowbyte, you needs a space according to the book.

And now someone will add that I'm wrong so I'm not sure I'm correct.

Re: Adc on 18f67k22 - an4

working though the issue i found a setting for the low power idle mode - Section 4.4 for this chip allows for functions to be shut down individually while still allowing register access ,

PMD0.0 enable / disables the ADC module , this was was set incorrectly

darrel did a simulator of the the an4 setting as a seperate test program and i just did a hardware test of it a few moments ago , and found the above setting to be the cause of no reading

Also an additional EErata sheet sent out 4 days ago - point 1.2 indicates that a adc error offset when using 12 bit so a calibration issue need to be addressed in the software , but appers 10 bit should avoid this issue ,

I am currently looking why the values read are so different to that of the 16f1947

here a link to the same question posed on melabs forum , with darrels sample config and test for reference
http://support.melabs.com/threads/96...=2177#post2177

cheers

sheldon

Re: Adc on 18f67k22 - an4

May or may not help...

I have been playing with an 18F87J50. This chip was giving me trouble.
For me, I had to place the same voltage on VDD and AVDD, and have the typical capacitors across all VDDs and VSSs, also placed a capacitor from AVDD to VSS. Now the chip has smoothed out.

Re: Adc on 18f67k22 - an4

There were some originally issues acording to the errata sheet's for the 18F67K22 dealing with the a/d offset issue. I have found that working with the latest versions of silicon that placing 1uF. tantalum filtering caps at the AVDD to AVSS cleaned up all of the noise I was experencing. I 12 of the 16 available A/D channels currently and have had no problems with the 12 bit conversions. I also use 10uF. tantalum caps as well as .1uF at all of the Vdd to Vss connections. I run the on board regulator w/5 volts on all other pins except the A/D +vref pin which is 4.096 volts.

Dave Purola,

Re: Adc on 18f67k22 - an4

thanks guys , i have added addtional 0.1 caps to the VDD,VSS , the AVDD and AVSS are connected to the Vdd,VSS ,with 10 uf caps on the 3v3 line
wondering what setting you have for adcon1 & ADCON2 ,

i am currently finding that putting a large TAD value of 12 is getting me more consistant values ,
, but like to minimise the time per read as much as possible

found setting the 2.048 Vref was not giving a consistent reads and setting it to AVDD is
so i used
adcon1= $00
adcon2 = %10101110

and not used the defin ADC_clock , ADC_sampleus commands

i am still at a loss to find why the values are large differences between the 16f1947 and this chip , except 16f1947 is 10 bit ADC
any way as long as the reading are consistent ill move forward

cheers

sheldon

Re: Adc on 18f67k22 - an4

Longpole001, here is my configs:
'--------------------------------- A/D SETUP -----------------------------------
ADCON0 = %00000001 'DONE,A/D ON
ADCON1 = %00010000 'REF+ = EXT,REF- = VSS,single ended
ADCON2 = %10010110 'RIGHT JUSTIFIED,FOSC/64

ANCON0 = %11111111 'AN0;AN7 ANALOG
ANCON1 = %00001111 'AN8;AN11 ANALOG
ANCON2 = %00000000 'ALL REMAINING DIGITAL

CM1CON = %00000111 'COMPARATORS ALL OFF
CM2CON = %00000111 'COMPARATORS ALL OFF
CM3CON = %00000111 'COMPARATORS ALL OFF
CVRCON = %00000000 'VOLTAGE REFERENCE OFF,OUTPUT OFF

HLVDCON = %00000000 'CLEAR IRVST,LVDEN,AND DISABLE
WDTCON = %00000000 'DISABLE WATCH DOG TIMER

CTMUCONH = %00000000 'DISABLE CTMU
CTMUCONL = %00000000 'DISABLE CTMU
CTMUICON = %00000000 'DISABLE CTMU

Re: Adc on 18f67k22 - an4

thanks dave ,
darrel did some testing on the adc , found that its readings and offsets are way off,
i have been getting some really strange readings as well
i decided to do an average of the readings to smooth out the results a bit but this result is a worry

http://support.melabs.com/threads/96...n-18f67k22-an4