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PULSIN ON PORTF and PORTG ON 16F1947
Hi guys ,
I am trying to get Pulsin to work on PORT F and Port G , but i cant get anything on it , tried on 3 chips so its got to be code related
this test code works on the other ports A-E but not on F and G
I test each port bit for pulsin command on port F,G but nothing , is there port limitation on Pulsin ??
i know port F,G are not in mem bank 0 as with ports A-E , but did not think that would be an issue
this has me stumped
cheers
Sheldon
Code:
Main:
ANSELF = $00 ' Set Port F - Digital I/O , 0 = Digital 1 = Analog
TRISF = $FF ' else IR-RX ( ports input)
pulsin PORTF.0,1,Leader
write $10,Leader.highbyte
write $11,Leader.lowbyte ' debug
pause 1000
Goto main
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Re: PULSIN ON PORTF and PORTG ON 16F1947
OTHER SETTINGS that affect portF and Port G - are disabled
also tried just seeing if each pin on the PORT F and G was able to see the clock pulses presented to each input pin , and seems to see both 0 and 1 on all ports , so not a solder/ board issue ,
but any measurement using Pulsin or RCtime wont work ???
also ensured the ADCON0 is disabled during the test
yep this one has me stumped !!
Code:
APFCON = %00000000 ' All Default - No change when using SPI use SDO1 = RC2 , bit6=0
CPSCON0 = $00 ' Capcitive Sensing Control Disable
CPSCON1 = $00 ' Disable CSC - used with CPSCON0
CM1CON0 = $00 ' Disable / Clear comparator 1
CM1CON1 = $00 ' Used with CM1CON0
CM2CON0 = $00 ' Disable / Clear comparator 2
CM2CON1 = $00 ' Used with CM2CON0
CMOUT = $00 ' Disable Comparitors output register - used only if comparitor on
SRCON0 = %00000000 ' Disable Latched Outputs
SRCON1 = %00000000 ' Used with SRCON0 register
DACCON0 = $00 ' Disable D/A
DACCON1 = $00 ' Disable D/A - used with DACCON0
LCDCON = $00 ' Disable LCD module
LCDPS = $00 ' Disable LCD module & LCD Phase Register
LCDCST = $00 ' Resistor lader contrast control
LCDREF = $00 ' Disable LCD voltage refernace control
LCDSE0 = $00 ' LCD segment enable register
LCDSE1 = $00 ' LCD segment enable register
LCDSE2 = $00 ' LCD segment enable register
LCDSE3 = $00 ' LCD segment enable register
LCDSE4 = $00 ' LCD segment enable register
LCDSE5 = $00 ' LCD segment enable register
LCDRL = $00 ' LCD Ref ladder enable / disable
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Re: PULSIN ON PORTF and PORTG ON 16F1947
if anyone has a 16f1947 , can they try a pulsin on port F or G and see if it works for them
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Re: PULSIN ON PORTF and PORTG ON 16F1947
any suggestions guys on this problem
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Re: PULSIN ON PORTF and PORTG ON 16F1947
Crickets... chirp... chirp...
Sorry, I'd give it a go, but it's the 16F1947 I don't have,
or anything else with that number of ports.
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Re: PULSIN ON PORTF and PORTG ON 16F1947
Those two ports deal with the LCD drive feature ...
so, I'd first verify if LCD correctly disabled ... ;)
Alain
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Re: PULSIN ON PORTF and PORTG ON 16F1947
yep thought it may have been the lcd option causing this , but i can read the ports directly so see if they are 1 or 0 also the lcd option is output segments , the ports are configured as inputs , both have analog options on them but i believe i have set this correctly for both ports
The only thought i have is that cos the ports F & G are not in the mem bank 0 , then pulsin does read the information correctly and not able to use them ?
but if some one has a chip that has ports that not use mem bank 0 - usually above port E , and pulsin works then that theory is shot , but be nice to know
hears the code relating to the tests and part of the chip config as it relates to port F and G
Code:
'----------- 16F1947 - PIC chip Dephalt settings --------------------
OSCCON = $70 ' Select 32Mhz , internal clock ( 8Mhz when conf2 - PLLEN_OFF)
' Bit 7 0 = 4xPLL disabled 1= 4xPLL enables ( overrided by conf word 2 setting - PLLEN)
' bits6-3 - 1111 = 16Mhz , 1110 = 8MHz or 32Mhz ( depends on 4xPLL - conf word 2) 1101 = 4 MHz, 1100 = 2MHz 1011 = 1MHz
' bitS 0-1 - 00= Clock set by Conf word ,01 = Timer1 OSC , 1x = internal Osc Block
' WDTCON = %00000000 ' Bit 7,6 = 0 n/a , Bit 5-1 = watchdog timer period select , bit 0 = SWDTEN enable / disable for Watchdog timer bit ( WDTE)
' set watchdog timer for 1ms and enabled by SWDTEN bit being set ( mode selected with _WDTE setting in Config1)
APFCON = %00000000 ' All Default - No change when using SPI use SDO1 = RC2 , bit6=0
CPSCON0 = $00 ' Capcitive Sensing Control Disable
CPSCON1 = $00 ' Disable CSC - used with CPSCON0
CM1CON0 = $00 ' Disable / Clear comparator 1
CM1CON1 = $00 ' Used with CM1CON0
CM2CON0 = $00 ' Disable / Clear comparator 2
CM2CON1 = $00 ' Used with CM2CON0
CMOUT = $00 ' Disable Comparitors output register - used only if comparitor on
SRCON0 = %00000000 ' Disable Latched Outputs
SRCON1 = %00000000 ' Used with SRCON0 register
DACCON0 = $00 ' Disable D/A
DACCON1 = $00 ' Disable D/A - used with DACCON0
LCDCON = $00 ' Disable LCD module
LCDPS = $00 ' Disable LCD module & LCD Phase Register
LCDCST = $00 ' Resistor lader contrast control
LCDREF = $00 ' Disable LCD voltage refernace control
LCDSE0 = $00 ' LCD segment enable register
LCDSE1 = $00 ' LCD segment enable register
LCDSE2 = $00 ' LCD segment enable register
LCDSE3 = $00 ' LCD segment enable register
LCDSE4 = $00 ' LCD segment enable register
LCDSE5 = $00 ' LCD segment enable register
LCDRL = $00 ' LCD Ref ladder enable / disable
OPTION_REG.7 = 1 ' Weak Pullups disabled 1 = globel disable 0 = globel enable ( set by each port - WPUB settings)
OPTION_REG.6 = 0 ' Interupt on Falling Edge of INT pin 0= falling edge 1= rising edge
OPTION_REG.5 = 0 ' TMR0 clock source - 1=T0clk pin 0=internal clock
OPTION_REG.4 = 0 ' TMR0 0=L/H of TOCKI pin 1=H/L of TOCKI pin
OPTION_REG.3 = 0 ' Use Prescaller for TMR0 0= Yes , 1 = No
OPTION_REG.2 = 1 ' Timer0 prescaler Rate Select bits 2-0(set to 1:256)
OPTION_REG.1 = 1 ' 000 = 1:2 , 001= 1:4 , 010 = 1:8 , 011 = 1:16
OPTION_REG.0 = 1 ' 100 = 1:32 , 101 = 1:64, 110 = 1:128 , 111 = 1:256
T1CON = %01110100 ' Timer 1 ,bit7-6 = TMR1 CLK source 00 = Instuction Clk(Fosc/4),01 =sys clk,10=ext clk,11=cap sense osc
' bit5-4 = TMR1 prescale 11= 1:8 ,bit3=0 LP off,bit2=1 no sync ext CLK ,bit1= 0 n/a,Bit0=0 Timer 1 on/off
T1GCON = %00000000 ' Timer 1 Gate Control bit7 0= counts regardless of gate 1 = gates in use , bit6 gate active when 1= High ,0=low
' bit5 0= toggle mode diabled 1= enabled bit4 single pulse mode 1- en 0= dis, bit 2 -status bit,1-0 - gate source sel
T2CON = %01110011 ' Timer 2 off + 1:15 postscale ,1:64 prescale ( bit 7 = x, bit6-3 1110 = 1:15 postscale, bit2=0 timer off ,bit1-0 = prescale 10 = 16 , 11= prescale 64
T4CON = %00000000 ' POSTSCALER 1/1,STOP,PRESCALER 1/1
T6CON = %00000000 ' POSTSCALER 1/1,STOP,PRESCALER 1/1
TMR0 = 0 ' Clear TMR0 MODULE REGISTER
TMR1H = 0 ' CLEAR TMR1H MODULE REGISTER
TMR1L = 0 ' CLEAR TMR1L MODULE REGISTER
TMR2 = 0 ' CLEAR TMR2 MODULE REGISTER
TMR4 = 0 ' CLEAR TMR4 MODULE REGISTER
TMR6 = 0 ' CLEAR TMR6 MODULE REGISTER
'PR2 = 255 ' Timer 2 Preload value
'PR4 = 255 ' Timer 4 Preload value
'PR6 = 255 ' Timer 6 Preload value
testing port F at the moment
Code:
' ------- Setup port F Variables ----------
ANSELF = %00000000 ' Set Port F - Digital I/O , 0 = Digital 1 = Analog
TRISF = %11111111 '( ports input)
currently Port G is setup for output ( except G.5 which is always input and config 1 " MCRLR is used for reset and not a digital input pin)
Port G has 6 I/O only
but when confirming test with pulsin
TRISG = %00111111
Code:
' ------- Setup port G Variables ----------
ANSELG = %00000000 ' Set Port G - Digital I/O , 0 = Digital 1 = Analog
TRISG = %00100000 ' setup Port G input=1,output=0 for I/O pins - portG.5 always input ( internal pullup) VPP/MCLR
PORTG = %00100000 ' Clear Outputs
test 1 - test pulsin with a clock source time period of 1ms high pulses applied on each port
Code:
DEFINE OSC 32 ' Timing reference for pause , pauseus commands
DEFINE PULSIN_MAX 5600 ' Maximum counts( clock ticks) allowed before pulsin times out( 5600 ^ 1.25us = 7 ms)
Main:
pulsin PORTF.2,1,Leader
if leader > 0 then
write $A0 , Leader.highbyte ' debug only
write $A1, Leader.Lowbyte 'debug
goto main
Test 2 - read logic level of port and write something to show if it was a 1 or 0 to eeporm
Code:
if PORTF.2 = 1 THEN LEADER = $1234
if PORTF.2 = 0 THEN LEADER = $5678
write $10,Leader.highbyte
write $11,Leader.lowbyte
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Re: PULSIN ON PORTF and PORTG ON 16F1947
not sure if a simulator show this to be working for this chip by chance ?
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Re: PULSIN ON PORTF and PORTG ON 16F1947
Do this:
Code:
Whatever your minimal config and setup for PULSIN on two ports here,
and make a pin that DOES work and a pin that DOES NOT work an input
if PBP requires it for PULSIN.
@ nop
@ nop
@ nop
PULSIN on a pin that does work
@ nop
@ nop
@ nop
PULSIN on a pin that does not work
'pulsin PORTF.2,1,Leader
@ nop
@ nop
@ nop
Then post source and compiled hex. You may not have to.
It's easy to at least tell if the bank switching is happening,
but maybe not the LCD configuration.
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3 Attachment(s)
Re: PULSIN ON PORTF and PORTG ON 16F1947
ok , the results of adding the nops , did not have an effect on the working ( port E) or the not working port ( port F)
values writen to eeprom were only for port e , all pins on port E have a signal applied , as does port F
cheers
Sheldon
cut down code is
Code:
'============================================================================================================
' Name : Pulsin Test Code 16f1947.pbp *
' Compiler : PICBASIC PRO Compiler 3.06.1 *
' Assembler : MPASM v5.43 *
' Target PIC : PIC16F1947 *
' Hardware : n/a *
' Oscillator : 32MHz internal *
' Code Ver : 0.0 *
' ----------------------------------------------------------------------------------------------------------*
' Ver Change : N/A *
' : 1. *
' : 2. *
' : 3. *
' : 4. *
'-----------------------------------------------------------------------------------------------------------*
' Description : A diag Pulsin for Port F and G , Ports A-E work ok With pulsin
' config for 16F1947
#CONFIG
;----- CONFIG1 Options --------------------------------------------------
__config _CONFIG1, _FOSC_INTOSC & _WDTE_ON & _PWRTE_ON & _MCLRE_ON & _CP_OFF & _CPD_OFF & _BOREN_OFF & _CLKOUTEN_OFF & _IESO_OFF & _FCMEN_OFF
;----- CONFIG2 Options --------------------------------------------------
__config _CONFIG2, _LVP_OFF & _BORV_HI & _STVREN_ON & _PLLEN_ON & _WRT_OFF & _VCAPEN_OFF
#ENDCONFIG
'----------- 16F1947 - PIC chip Dephalt settings --------------------
OSCCON = $70 ' Select 32Mhz , internal clock ( 8Mhz when conf2 - PLLEN_OFF)
' Bit 7 0 = 4xPLL disabled 1= 4xPLL enables ( overrided by conf word 2 setting - PLLEN)
' bits6-3 - 1111 = 16Mhz , 1110 = 8MHz or 32Mhz ( depends on 4xPLL - conf word 2) 1101 = 4 MHz, 1100 = 2MHz 1011 = 1MHz
' bitS 0-1 - 00= Clock set by Conf word ,01 = Timer1 OSC , 1x = internal Osc Block
' WDTCON = %00000000 ' Bit 7,6 = 0 n/a , Bit 5-1 = watchdog timer period select , bit 0 = SWDTEN enable / disable for Watchdog timer bit ( WDTE)
' set watchdog timer for 1ms and enabled by SWDTEN bit being set ( mode selected with _WDTE setting in Config1)
APFCON = %00000000 ' All Default - No change when using SPI use SDO1 = RC2 , bit6=0
ADCON0 = %00010000 ' DISABLE ADC AN4 ,( ADCON1 setup at start of program , Right Justify, FRC clock )
CPSCON0 = $00 ' Capcitive Sensing Control Disable
CPSCON1 = $00 ' Disable CSC - used with CPSCON0
CM1CON0 = $00 ' Disable / Clear comparator 1
CM1CON1 = $00 ' Used with CM1CON0
CM2CON0 = $00 ' Disable / Clear comparator 2
CM2CON1 = $00 ' Used with CM2CON0
CMOUT = $00 ' Disable Comparitors output register - used only if comparitor on
SRCON0 = %00000000 ' Disable Latched Outputs
SRCON1 = %00000000 ' Used with SRCON0 register
DACCON0 = $00 ' Disable D/A
DACCON1 = $00 ' Disable D/A - used with DACCON0
LCDCON = $00 ' Disable LCD module
LCDPS = $00 ' Disable LCD module & LCD Phase Register
LCDCST = $00 ' Resistor lader contrast control
LCDREF = $00 ' Disable LCD voltage refernace control
LCDSE0 = $00 ' LCD segment enable register
LCDSE1 = $00 ' LCD segment enable register
LCDSE2 = $00 ' LCD segment enable register
LCDSE3 = $00 ' LCD segment enable register
LCDSE4 = $00 ' LCD segment enable register
LCDSE5 = $00 ' LCD segment enable register
LCDRL = $00 ' LCD Ref ladder enable / disable
OPTION_REG.7 = 1 ' Weak Pullups disabled 1 = globel disable 0 = globel enable ( set by each port - WPUB settings)
OPTION_REG.6 = 0 ' Interupt on Falling Edge of INT pin 0= falling edge 1= rising edge
OPTION_REG.5 = 0 ' TMR0 clock source - 1=T0clk pin 0=internal clock
OPTION_REG.4 = 0 ' TMR0 0=L/H of TOCKI pin 1=H/L of TOCKI pin
OPTION_REG.3 = 0 ' Use Prescaller for TMR0 0= Yes , 1 = No
OPTION_REG.2 = 1 ' Timer0 prescaler Rate Select bits 2-0(set to 1:256)
OPTION_REG.1 = 1 ' 000 = 1:2 , 001= 1:4 , 010 = 1:8 , 011 = 1:16
OPTION_REG.0 = 1 ' 100 = 1:32 , 101 = 1:64, 110 = 1:128 , 111 = 1:256
T1CON = %01110100 ' Timer 1 ,bit7-6 = TMR1 CLK source 00 = Instuction Clk(Fosc/4),01 =sys clk,10=ext clk,11=cap sense osc
' bit5-4 = TMR1 prescale 11= 1:8 ,bit3=0 LP off,bit2=1 no sync ext CLK ,bit1= 0 n/a,Bit0=0 Timer 1 on/off
T1GCON = %00000000 ' Timer 1 Gate Control bit7 0= counts regardless of gate 1 = gates in use , bit6 gate active when 1= High ,0=low
' bit5 0= toggle mode diabled 1= enabled bit4 single pulse mode 1- en 0= dis, bit 2 -status bit,1-0 - gate source sel
T2CON = %01110011 ' Timer 2 off + 1:15 postscale ,1:64 prescale ( bit 7 = x, bit6-3 1110 = 1:15 postscale, bit2=0 timer off ,bit1-0 = prescale 10 = 16 , 11= prescale 64
T4CON = %00000000 ' POSTSCALER 1/1,STOP,PRESCALER 1/1
T6CON = %00000000 ' POSTSCALER 1/1,STOP,PRESCALER 1/1
TMR0 = 0 ' Clear TMR0 MODULE REGISTER
TMR1H = 0 ' CLEAR TMR1H MODULE REGISTER
TMR1L = 0 ' CLEAR TMR1L MODULE REGISTER
TMR2 = 0 ' CLEAR TMR2 MODULE REGISTER
TMR4 = 0 ' CLEAR TMR4 MODULE REGISTER
TMR6 = 0 ' CLEAR TMR6 MODULE REGISTER
'PR2 = 255 ' Timer 2 Preload value
'PR4 = 255 ' Timer 4 Preload value
'PR6 = 255 ' Timer 6 Preload value
' ---------------- Setup All Define statements ------------
DEFINE OSC 32 ' Timing referance for pause , pauseus commands
DEFINE PULSIN_MAX 5600 ' Maximum counts( clock ticks) allowed before pulsin times out( 5600 ^ 1.25us = 7 ms)
'DEFINE SHIFT_PAUSEUS 3 ' Delay Shiftout and Shiftin command timing by 3 us to 5us ( min 2us)
' ------- Setup port A Variables & directions ----------
ANSELA = %00100000 ' Set Port A - Digital I/O , 0 = Digital 1 = Analog - Set RA5 (AN4) to be analog input for V-Mon
TRISA = %00100000 ' setup Port A input=1,output=0 for I/O pins
PORTA = %00100000 ' Clear Outputs
' ------- Setup port B Variables & directions ----------
TRISB = %11010000 ' setup Port A input=1,output=0 for I/O pins ( Note RA4 - input only)
WPUB = %11010000 ' Port B - Turn off week Pullups 1=ON , for each port ( globle enable set in option_reg.7)
PORTB = %00000000 ' Clear Outputs
' ------- Setup port C Variables & directions ----------
TRISC = %00010000 ' setup Port C input=1,output=0 for I/O pins
PORTC = %00010000 ' Clear Outputs
' ------- Setup port D Variables & directions ----------
TRISD = %00000000 ' setup Port D input=1,output=0 for I/O pins
PORTD = %00000000 ' Clear Outputs
' ------- Setup port E Variables ----------
TRISE = $FF ' else IR-RX ( ports input)
' ------- Setup port F Variables ----------
ANSELF = %00000000 ' Set Port F - Digital I/O , 0 = Digital 1 = Analog
TRISF = $FF ' input)
' ------- Setup port G Variables ----------
ANSELG = %00000000 ' Set Port G - Digital I/O , 0 = Digital 1 = Analog
TRISG = %01000000 ' setup Port G input=1,output=0 for I/O pins - portG.5 always input ( internal pullup) VPP/MCLR
PORTG = %01000000 ' Clear Outputs
' --------- Pulsin variables ------------
Leader var word ' Value for pulse read in pulsein inputs ( high and Low)
'----------- main program ---------------
Main:
'===========PORT E LOWER =========
pulsin PORTE.0,1,lEADER ' pORT e.0
iF lEADER >0 THEN
WRITE $A0,lEADER.HIGHBYTE
WRITE $A1,lEADER.LOWBYTE
ENDIF
pulsin PORTE.1,1,lEADER 'pORT E.1
iF lEADER >0 THEN
WRITE $A2,lEADER.HIGHBYTE
WRITE $A3,lEADER.LOWBYTE
ENDIF
pulsin PORTE.2,1,lEADER
iF lEADER >0 THEN
WRITE $A4,lEADER.HIGHBYTE
WRITE $A5,lEADER.LOWBYTE
ENDIF
pulsin PORTE.3,1,lEADER
iF lEADER >0 THEN
WRITE $A6,lEADER.HIGHBYTE
WRITE $A7,lEADER.LOWBYTE
ENDIF
'================= PORT E upper ================
pulsin PORTE.4,1,lEADER
@ nop
@ nop
@ nop
iF lEADER >0 THEN
WRITE $A8,lEADER.HIGHBYTE
WRITE $A9,lEADER.LOWBYTE
ENDIF
pulsin PORTE.5,1,lEADER
iF lEADER >0 THEN
WRITE $AA,lEADER.HIGHBYTE
WRITE $AB,lEADER.LOWBYTE
ENDIF
pulsin PORTE.6,1,lEADER
iF lEADER >0 THEN
WRITE $AC,lEADER.HIGHBYTE
WRITE $AD,lEADER.LOWBYTE
ENDIF
pulsin PORTE.7,1,lEADER
iF lEADER >0 THEN
WRITE $AE,lEADER.HIGHBYTE
WRITE $AF,lEADER.LOWBYTE
ENDIF
' =========== PORT F LOWER ================
pulsin PORTF.0,1,lEADER
@ nop
@ nop
@ nop
iF lEADER >0 THEN
WRITE $B0,lEADER.HIGHBYTE
WRITE $B1,lEADER.LOWBYTE
ENDIF
pulsin PORTF.1,1,lEADER
iF lEADER >0 THEN
WRITE $B2,lEADER.HIGHBYTE
WRITE $B3,lEADER.LOWBYTE
ENDIF
pulsin PORTF.2,1,lEADER
iF lEADER >0 THEN
WRITE $B4,lEADER.HIGHBYTE
WRITE $B5,lEADER.LOWBYTE
ENDIF
pulsin PORTF.3,1,lEADER
iF lEADER >0 THEN
WRITE $B6,lEADER.HIGHBYTE
WRITE $B7,lEADER.LOWBYTE
ENDIF
' ========== PORT F UPPER ==================
pulsin PORTF.4,1,lEADER
iF lEADER >0 THEN
WRITE $B8,lEADER.HIGHBYTE
WRITE $B9,lEADER.LOWBYTE
ENDIF
pulsin PORTF.5,1,lEADER
iF lEADER >0 THEN
WRITE $BA,lEADER.HIGHBYTE
WRITE $BB,lEADER.LOWBYTE
ENDIF
pulsin PORTF.6,1,lEADER
iF lEADER >0 THEN
WRITE $BC,lEADER.HIGHBYTE
WRITE $BD,lEADER.LOWBYTE
ENDIF
pulsin PORTF.7,1,lEADER
iF lEADER >0 THEN
WRITE $BE,lEADER.HIGHBYTE
WRITE $BF,lEADER.LOWBYTE
ENDIF
Goto main
'------------------------------------------
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Re: PULSIN ON PORTF and PORTG ON 16F1947
That's not quite what I meant.
I mean only the code required to test the two pins, very minimal.
It can be seen from the hex disassembly if the bank switching is happening or not.
It only makes things more difficult if all the rest of your code is in it as well.
The three nop instructions are there because they compile straight to the same thing
in assembler prior to compile to hex, so when the hex file is disassembled, the
PULSIN instruction disassembly are present with three nops separating each of them.
Then it is clear, the difference between the two disassembled PULSIN commands.
That could rule out, or confirm that bank switching is happening.
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2 Attachment(s)
Re: PULSIN ON PORTF and PORTG ON 16F1947
OK ART ,
please see attached - code 2 is portE.4 working - see hex
code 3 port F.0 not working - see hex
Code:
'----------- main program ---------------
Main:
' code 2 test
' '================= PORT E upper ================
@ nop
@ nop
@ nop
pulsin PORTE.4,1,lEADER
@ nop
@ nop
@ nop
iF lEADER >0 THEN
WRITE $A8,lEADER.HIGHBYTE
WRITE $A9,lEADER.LOWBYTE
ENDIF
Goto main
'------------------------------------------
Code:
'----------- main program ---------------
Main:
' code ver 3 test
' '================= PORT E upper ================
@ nop
@ nop
@ nop
pulsin PORTF.0,1,lEADER
@ nop
@ nop
@ nop
iF lEADER >0 THEN
WRITE $A8,lEADER.HIGHBYTE
WRITE $A9,lEADER.LOWBYTE
ENDIF
Goto main
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Re: PULSIN ON PORTF and PORTG ON 16F1947
Well bummer, it appears Windows 7 can't run ICprog :(
It has a free 16F disassembler, although outdated, it should still translate opcodes that it understands.
So I bit the bullet and had a look at your asm file, but that isn't assembler,
only some intermediate file between PBP and asm perhaps.
All of the PBP instructions are present on the right, but the main text is some gibberish.
This leads me to question how anyone is disassembling a PBP hex in this era.
The defines for bank switching (all banks) are all there, and the include file
certainly does appear to know all there is to know about the chip.
Now it seems I have a problem of my own!
I would not use PBP with a chip any later than 16F628, 16F877, etc.
if you could not fully disassemble it.
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Re: PULSIN ON PORTF and PORTG ON 16F1947
mmm thats a pain , yes running the ver of PBP 3.07, with mplab at 8.90
has to be a way to solve this , it really is making me think that its cos port F and G are not part of bank0
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Re: PULSIN ON PORTF and PORTG ON 16F1947
well thats what i thought
i just got email from darrel and yes its PBP3.0 issue for ports f, g on 16f1947
Quote:
PBP 2.60 and later, PBP commands on PORTF and PORTG of 16F1946/1947
Published on 12-04-2013 10:03 AM
With PBP 2.60 and later (up to 3.0.7.x), PBP commands that automatically set the TRIS bits will not work properly on PORTF or PORTG of the 16F1946/1947.
An issue with bank selection for the TRIS register has been identified.
Hopefully, this will be corrected by version 3.0.8.x
2.60(A,B,C) will continue to have this issue.
There are no workarounds.
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Re: PULSIN ON PORTF and PORTG ON 16F1947
Hi, Sheldon
could you tell us which are your pulses characteristics ???
Alain
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Re: PULSIN ON PORTF and PORTG ON 16F1947
i am measuring a clock source of about 70us - 3ms on / 300 us off over 16 inputs , unfortunate port f and g were part of that
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Re: PULSIN ON PORTF and PORTG ON 16F1947
Quote:
Originally Posted by
longpole001
i am measuring a clock source of about 70us - 3ms on / 300 us off over 16 inputs , unfortunate port f and g were part of that
If you were reading PULSIN on any given port pin, you couldn't be looking at any other pins at the same time anyway,
you could have only been cycling through all of the pins checking one at a time because PULSIN ties up execution until it's done.
You stated in your first post that you can still check for high or low condition on the suspect ports.
Why not count the number of low to high transitions over a period of time on the suspect ports?
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Re: PULSIN ON PORTF and PORTG ON 16F1947
why not make your own pulsin it maynot be perfect but it will give reliable results
set a 16 bit timer to overflow just past 3ms with appropriate pre and post scalers
then
my_pulsin:
txcon = 0 ;stop the timer x
tmrx.hi =0 ; reset timerx to 0
tmrx.low =0
while portf.x ; waiting for a low pulse
txcon = ? ; the appropriate setting
while !portf.x ; timing the low period
txcon = 0 ;stop the timer x
pulsletime.highbyte = tmrx.highbyte
pulsletime.lowbyte = tmrx.lowbyte
return
I just notice your clock is 32mhz so timer1 will give you a 8ms max time with a 1:1 prescale and a 1.25uS resolution , I'm no sure what the min measurable time woud be but it will be consistant
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Re: PULSIN ON PORTF and PORTG ON 16F1947
I think PBP.3.07 will not set the TrisF port correctly , i tried even using asm in the PbP to set it
what i have done is i have wired up port D & E and tested the code using pulsin , i have other design updates to do with the prototype board so ill throw the 16F1947 in favor of 18F67K22 , with a small increase in PIC price ,
the pins are near compatible except for how voltage regulator on this chip is done
I will also try the port f and g on the 18F67K22 as well
hope PBP3.0 support F and G on the 18F67k22 / k90 chips
cheers
Sheldon
will find out
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Re: PULSIN ON PORTF and PORTG ON 16F1947
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Re: PULSIN ON PORTF and PORTG ON 16F1947
You would certainly be able to bank select and set tris in asm,
it's just that if you use PULSIN on the port it will select an incorrect bank before executing or whatever it's doing wrong.
Then it's just a matter of whether or not manually reading pins has the same problem.
It might be wiser to use another chip anyway, in case there's
a similar problem with other commands later on.
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Re: PULSIN ON PORTF and PORTG ON 16F1947
yes thanks guys , the 16F1947 advantages disappear when 2 complete ports are not available easily , combined with the silicon rev 2 which has its own issues with adc
Once bitten etc etc ,
I have learned a lot from this one ,and to do a very, very ,very good search of
1. any erratica notices on the chip of choice
2. make more effort to find any "known issues" with the compiler of choice for the chip chosen "
3. expect that the rev you going to get is most likely the buggy one and not the latest unless chip is over 2 years old or more -
4. Microchip dont give silicon revision information on the chips to the suppliers and no notice of when a bach numbering is of a sillicon revision
5. most if not all supplier do not have or track batch numbering of chips
after talking to microchip directly in usa on the phone and via email , ( i have about 100 16f1947 , all rev 2 on hand for this project ), fortunately the supplier will refund ,
and only when you do a "special order " for a silicon revision.will the silicon be known , i am still waiting on details of MRQ requirements to meet the special order requirements.
any way ill continue on debug part of this program with the 16f1947 as i am stuck with it on this board for prototyping phase which mainly to confirm the concept and application.
have ordered some 18F67K22 which is close enough to be good enough if i still want to use the PCB's that are made ,
but see how many other changes are needed , sometimes cheaper in time and money just to throw PCB's and do correctly.
cheers
Sheldon
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Re: PULSIN ON PORTF and PORTG ON 16F1947
Sheldon, I have used 18F67K22's for about a year now and have had NO problems with them. I ONLY order my parts from MicroChip Direct as they always have the latest silicon. If you buy from any other source, you have NO idea how long the parts have been sitting on the shelf.
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Re: PULSIN ON PORTF and PORTG ON 16F1947
yep i think that what ill do as well from now on , i am not sure if the chips on hand from microchip in australia may be older than that of the usa stocks , but i think there is better chance they be the most upto date
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Re: PULSIN ON PORTF and PORTG ON 16F1947
If you deal with microchip direct, good chance your orders will come straight from factory in Malaysia.
My samples came to Canada from there.
Robert
