hpwm more than 2 ch possible in pbp?????????
i am wondering if it is at all possible to have more than 2 ch of hpwm within pbp????????????? i am using a pic16f767 with 3 hpwn chs yet i can only seem to get 2 running?? ch 2 seems to be mixed/ shared with ch 3 for some reason.. ie ccp1 is fine but when i write a value to ccp2 it shows up on ccp3!!!!!!! im boggled.. i have tryed all the possible reg configs i can think of yet still no joy... has anyone got any pointers??? i am totally stuck here !! lol.
thank you
oscar..
oops my mistake...........
im so duhhhhhhhhhh.. lol the no ccp3 mystery is sloved... i somehow had another chip type selected!!!!!
question.... would their be any reason with the code u gave me bruce as to why ch2 hpwm2 that is flickers when at a low value?
thanx
oscar
Sneek into PBPPIC14.LIB in your PBP folder
Hi,
That's the library bruce was talking about. This contains the PBP function which is used by the compiler to extract and create codes and fits into the target processor. So portions only needed by your code are compiled according to PIC and placed in the top part of your compiled prog.
The problem with the HWPM command is that it calculates the PR2 (Freq) and CCP1CON + CCPCON (Duty Cycle) every time you use it in your code. That's the reason why changes do not take place immediately. So it is always a better idea to modify the duty cycle registers directly. To make life easy use the HPWM once then go on varying the duty cycle yourself. Depending on the PR2 values (read the datasheet for the Math) you should have a limit on the max duty cycle value to ensure smooth rollover.
It was Bruce's code found in a thread which gave me the wayout. Thanks bruce. I should have thanked you much earlier for showing the path.
I do not have a chip lying around that has 3 channels HPWM. I would sure like to give a try modifying the library. No commitments however (My firm is a design house and basically one man army on the development front!!!)