Duty Cycle

I am really struggling with the PIC12F683 PWM module, duty cycle.

Moving on from my recent post regarding 38khz modulator, I can not find enough information in the datasheet about how to write
the duty cycle % or time into the two registers. The problem is that i can see examples posted here, but can't see how thay fit into the
calculation for duty cycle in the datasheet.


If anyone could explain how the 10 bits (8 Bits + 2Bits) are actually written or how the calculation works i would be grateful.....


Gordon,,

Because the duty cycle control bits are spread across two registers, it confused me too, but Henrik helped me on this, here 's a little sub routine that I put into my program based on what I gleaned from Henrik....
(it's not specific to the 12f683 & I've not checked, but it shows you the approach)

Code:

---

change_hpwm:
CCP1CON.4 = Duty.0      'Bit 0
CCP1CON.5 = Duty.1      'Bit 1
CCPR1L = Duty >> 2      'Bit 2-7
return

---

...just remember to declare duty variable as a word, therefore

Code:

---

duty var word

---

So now, to change the duty cycle, it's as simple as for example...

Code:

---

duty = 253
gosub change_hpwm

---

(btw I used to use 12f683, but for a few cents more...buy the 12F1822, it's much more flexible)

Hi,
Lets say you're operating at 4Mhz, that means the timer running used to generated the PWM ticks along at 1MHz, you want 25kHz PWM frequency. This means that there is 40 timer ticks per PWM period (with prescaler 1:1). Now, writing anything between 0 and 39 to CCPR1L will control the duty cycle from 0-100% in steps of 2.5%. Write 20 to CCPR1L and you'll get ~50% dutycycle.

The two lower bits comes from the fact that the output can be be shut off at any of the 4 internal " clock steps" making up one instruction cycle (basically where FOsc/4 comes from). This means that instead of 40 "duty cycle steps" you'll get 160 (0-159)

So if you want 50% dutycycle (a value of 80) you have the binary value %01010000 you load the two lower bits (00) into CCP1CON.4 & 5 and the 6 higher bits into CCP1RL but shifted down so they "line up" with the LSB of the CCP1RL register. What happens is that the value 20 (10100) ends up in CCPR1L.

If you're operating at 4Mhz and PWM'ing at 38kHz there's a PWM period of 26.3158 timer ticks (that's not possible so I'm guessing you're actually running at 38461Hz (26 ticks per period). The dutycycle will have a range of 0 to 103, a ~50% dutycycle will have the value 52 (%00110100) . Load CCP1CON.4 and 5 with 0 and load CCPR1L with 13.

Hope I got this right, if not I hope someone will correct me!
/Henrik.

Hi, Thanks for this.

I understand the routine, but the actual details is still not clear.

If you take the example of 253, would this be:

253 = 11111101 So

10 9 8 7 6 5 4 3 2 1 0 bits
1 1 1 1 1 1 0 1 binary 253

So if that is correct, what is 253? is it the time in uS? And how does that relate to the datasheet calculations for duty period and ratio.

The reason is that i have been looking a a 38Khz modulator 50%, i have seem the examples posted here, showing period at 25, and duty at 13.

But i can't make those values work with the calculations.

I am sorry if i am missing the obvious,

Gordon

The 253 in my example relates to the duty cycle required...

Assume 8 bit PWM ...the maximum duty cycle (100% ...full on) would be a value of 255 (a value of 0 being the minimum), a 50% duty cycle would be 127 ...and so on.

Therefore for 8 bit pwm a setting of 255 = 100% duty (remember 0 is the first value ...so that all amount to 256 possible values) ...for the purposes of calculation we can call 100% a duty of 1.

So in my earlier example, the duty in place (253) would be a 253th of 256 possible values or ......1/256 * 253 ...which is 98.828125%.

We're not talking 'time' as such here ...but a ratio of on to off.

The problem with a PWM frequency of 38Khz is that - depending on your PIC Clock - you might not be able to use 256 values of PWM (the amount of pwm bits available is inverse to your chosen PWM frequency)...a quick check with Mister E's Pic multicalc (http://www.picbasic.co.uk/forum/show...8308#post78308) shows that at 38.462 KHz and a PIC oscillator setting of 8Mhz, you've actually only 210 bits of pwm available to you ..... therefore for 50% duty, you'd need a duty cycle register value of 105 & so on.

The PWM period is defined in units of 1/(Fosc/4).
If you're operating at 4Mhz the PWM period is defined in units of us and the dutycycle in terms 0.25us. A PWM period value 26 means a PWM period 26us which is equal to 38461Hz.

The PWM output goes high when the period start (timer = 0) and goes low when the timer equals CCPR1L (and the internal "instruction cycle clock" equals CCP1CON.4:5).

CCPR1L = 13
Period starts, output goes high. Timer ticks along.....13 ticks later it matches CCPR1L, output goes low....timer continues, when it reaches 26 it automatically resets to 0 and the cycle repeats. Output is high for 13 ticks and low for 13 ticks - you get a 50% dutycycle. Set CCPR1L to 6 and the output is high for 6 ticks and low for 20 ticks - you get a 25% dutycycle.

To get better resolution you can use the CCP1CON.4:5 bits. This uses the extra two bits retrieved from the internal "instruction cycle clock" and is why you can get 4 "steps" per tick. This allows the PWM module to drive the output low "in between" normal timer ticks. If you're not interested in the high resolution don't bother with the two lower bits.

The higher PWM frequency (lower/shorter period) you use the less resolution you'll get (as I hope you can see from above).

/Henrik.

Hi Henrik,

It is slowly sinking in!

But, how do i get the duty range in your example 0-103 is this just the 26 * 4 = 104 (with 103 available)?


Gordon,,,

Hi,
Yes basically, 104 steps, 0-103.
103 = %01100111 where the lower two bits go in CCPCON.4:5 and the other, shifted to the right in in CCPR1L (00011001) = 25.

Think of CCPR1L as bits to left of a decimal point and CCPCON.4:5 as bits to the right of decimal point. Because you only have two bits to the right of the decimal point the number can only be x.0%(00), x.25%(01), x.50%(10), x.75%(11).

If you have a period of 26 ticks (no matter what that actually means in terms of frequency), a dutycycle of 13.0 is 50%.

When you have a period of 26 you get a 50% dutycycle by setting the dutycycle register(s) to "00011001.00" (or "13.00") because 13 is 50% of 26 which is your PWM period in timer ticks).

/Henrik.

If I were you...
Here is where I would dust off the old O-Scope and be able to see what the effect of different values had on the duty cycle.

Nothing like being able to SEE what is going on in your program.

Like one of Darrels signatures stated...

"I hear and forget, I see and understand, I do and remember" Or something like that... and I don't remember who he was quoting... Albert Einstein or Confucus or
sombody like that.

Any way I always enjoy and learn from being able to visualize the PWM cycle using an oscope... then you can try different values and see if your calculations are proving true.;)

Dwight, you mean to imply there is a real world side to all this stuff?

Many thanks to Henrik for taking the time to explain this for me, at last it is clear...

But Hekler is absolutely right, there's no substitute for actually seeing it working.


Gordon,,