Noise on PORTC.0 with PIC16F73

Hi All

I am using a PIC16F73 and I am trying to pulse PORTC.0, PORTC.1 and PORTC.2
I have set these ports as outputs using TRISC = %11111000
However, when I measure the signal on the pins, the pulse for PORTC.1 and PORTC.2 is clean, but the signal for PORTC.0 is very dirty, i.e. lots of noise?
How can I get rid of this noise on PORTC.0?

Thank you in advance for any help!

Here is all my code:

DEFINE OSC 20

DEFINE LCD_DREG PORTB
DEFINE LCD_DBIT 0
DEFINE LCD_RSREG PORTA
DEFINE LCD_RSBIT 4
DEFINE LCD_EREG PORTC
DEFINE LCD_EBIT 3


DEFINE LCD_BITS 4
DEFINE LCD_LINES 2
DEFINE LCD_COMMANDUS 2000
DEFINE LCD_DATAUS 50
DEFINE NO_CLRWDT 1 ' Don't insert CLRWDTs


TRISC = %11111000 ' Set RC0, RC1, RC2 to output, rest is input


loop:
PORTC.0 = 1
PORTC.1 = 1
PORTC.2 = 1
PORTC.0 = 0
PORTC.1 = 0
PORTC.2 = 0

Goto loop

I forgot to say:
The noise on PORTC.0 is present during the off pulse

After reading another thread I added
LOW PORTC.0
just before the loop and this seemed to solve my problem!
Why would that be?
Isn't TRISC %11111000 supposed to set PORTC.0 as an output?

Quote:

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Originally Posted by passion1

After reading another thread I added
LOW PORTC.0
just before the loop and this seemed to solve my problem!
Why would that be?
Isn't TRISC %11111000 supposed to set PORTC.0 as an output?

---

Hello Passion1,
Yes TRISC <font color=red><b>=</b></font color>%11111000 will set RC0 as an output
LOW PORTC.0 is a RMW operation and the data sheet advises not to do this on portC of this chip. RC.0 shares TMR1clockin and osc functions so you want to disable those if using as a standard I/O so:
T1CON.0 = 0 'disable timer 1
CCP1CON=0 ' disable capture compare module which works with timer 1

Quote:

---

Datasheet SEC. 4.3
"Since the TRIS bit override is in effect while peripheral is enabled, read-modify-write instructions (BSF, BCF, XORWF) with TRISC as destination should be avoided."

---

Joe

Thank you!
I used

T1CON.0 = 0 'disable timer 1
CCP1CON=0 ' disable capture compare module which works with timer 1

and that solved my problem completely!

I have some doubt about it... @POR, Timer1 is already off, CCP as well.

What you experiment is indeed an RMW issue. You don't want to write to successive output bit by bit, this will cause some problem one day or another, and faster your OSC is, more chance you have to see it happen.

What you want to do is to write to the WHOLE PORT at once instead of single bits.

Here:
PORTC=7
PORTC=0
Goto Here

Use shadow register, modify it, then dump it to your specific PORT, that's my suggestion.

Hi, Passion

What Kind of load do you have on portC.0 ???

Here, your signal might not be far from ... ~ 700 kHz ( at first sight ! 555 Khz ... at second sight )

Alain

Quote:

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Originally Posted by mister_e

I have some doubt about it... @POR, Timer1 is already off, CCP as well.

What you experiment is indeed an RMW issue. You don't want to write to successive output bit by bit, this will cause some problem one day or another, and faster your OSC is, more chance you have to see it happen.

What you want to do is to write to the WHOLE PORT at once instead of single bits.

Here:
PORTC=7
PORTC=0
Goto Here

Use shadow register, modify it, then dump it to your specific PORT, that's my suggestion.

---

PortC value on POR,BOR xxxx xxxx
value on all other resets uuuu uuuu

PortC Data direction Register
value on all resets 1111 1111

My theroy is T1 osc was causing his noise.