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View Full Version : strange problem ! pic18f4550 & pic16f84a serial communication .



amenoera
- 17th March 2008, 04:56
hi everybody .

here its is what i want to do exactly and wat i got .

i want to connect 4 pic16f84a to 1 pic18f4550 serially . and every pic16 send
its portb value to pic18 serially . then pic18 send the value to my pc usb . so i write the code for pic16 and test it on my pc serial port and its working fine and send the right value . what when connect to pic18 , pic18 send wrong values . here is my code and hope to find anything wrong ?
************************************************** ***

' pic16f84a code
include "modedefs.bas"
define osc 4
TRISB = %11111111 ' portb all input
PORTB = %00000000 ' portb 0
TX VAR PORTA.2 ' transmmit
B0 VAR BYTE ' var for store portb value
B1 VAR BYTE ' var for store portb value

start :
B0 = PORTB
PAUSE 100
B1 = PORTB
IF B1 = B0 THEN start
IF B1<> B0 THEN SEROUT TX,N9600,[B1]
B1 = B0
GOTO start
************************************************** *******
'pic18f4550 code
Include "modedefs.bas"
INCLUDE "DT_INTS-18.bas"
DEFINE OSC 20
PORTD = 0
TRISD = %11111111
ASM
INT_LIST macro
INT_Handler USB_INT, _DoUSBService, ASM, yes
endm
INT_CREATE
endasm

USBBufferSizeTX con 8
USBBufferSizeRX con 8
USBBufferCount Var Byte
USBBufferIn var byte[8]
USBBufferOut Var Byte[8]
DataToSend var byte[8]
RX VAR PORTD.1
VAR0 VAR BYTE
asm
SendUSB macro array
variable i=0
while i<8
MOVE?BB (array+i),(_USBBufferOut+i)
i+=1
endw
L?CALL _DoUSBOut
endm
endasm
SwHwInit:
GOSUB DoUSBinit:
Start:


'************************************************* *********************
serin rx,N9600,VAR0
datatosend[4] = VAR0
'************************************************* *********************


@ SendUSB _DataToSend
gosub dousbin
goto start
DoUSBIn:
@ INT_DISABLE USB_INT
USBBufferCount = USBBufferSizeRX
USBService
USBIn 1, USBBufferin, USBBufferCount, Timeout
Timeout:
@ INT_ENABLE USB_INT
return
DoUSBOut:
@ INT_DISABLE USB_INT
WaitPC:
USBBufferCount = USBBufferSizeTX
USBService
USBOut 1, USBBufferOut, USBBufferCount, Waitpc
@ INT_ENABLE USB_INT
return
usb_device_state var byte EXT
CONFIGURED_STATE CON EXT
DoUSBinit:
pause 500
usbinit
repeat
usbservice
until usb_device_state = CONFIGURED_STATE
@ INT_ENABLE USB_INT
return
DoUSBService:
usbservice
@ INT_RETURN
************************************************** ********

thanks , regards

Rob
- 17th March 2008, 09:06
Hi,

not sure if your Oscillator is set to the correct frequency. 20MHz; should this not be 48MHz? Are you defining the configs correctly for use with PLL?

For a 20MHz crystal I use these:



'Config1L
' Full-speed USB Clock Source Selection: Clock Source from 96MHz PLL/2
' CPU System Clock Postscaler: Prescaler Divide by 5 for 20MHz Crystal
' 96MHz Prescaler: Divide by 5 (20MHz Input)
@ __CONFIG _CONFIG1L, _USBDIV_2_1L & _CPUDIV_OSC1_PLL2_1L & _PLLDIV_5_1L

'Config1H
'Oscillator: HS oscillator, PLL enabled, HS used by USB
'Fail-Safe Clock Monitor Enable: Enabled
'Internal External Switch Over Mode: Disabled
@ __CONFIG _CONFIG1H, _FOSC_HSPLL_HS_1H & _FCMEM_ON_1H & _IESO_OFF_1H


Cheers

Rob

amenoera
- 18th March 2008, 00:04
thanks for reply , but when i paste this code i get an error .

and am sure i setup it to correct frequency .

error :
overwriting previous address contents (0000) .
symbol not previously defined (_fcmem_on_1h) .

regrads .

skimask
- 18th March 2008, 02:37
error :
overwriting previous address contents (0000) .
symbol not previously defined (_fcmem_on_1h) .

I've seen this before somewhere. Don't remember what the deal was.

Do a search on fcmem and fcmen.
Should fix you up...

EDIT: Found it...
Old versions of MPLAB use FCMEM, new one uses FCMEN

http://www.picbasic.co.uk/forum/showthread.php?t=5418&highlight=fcmem+fcmen&page=3
Post #82

Rob
- 18th March 2008, 08:12
thanks for reply , but when i paste this code i get an error .
and am sure i setup it to correct frequency .


Skimask has given you the answer for the error but the frequency will need to be defined as 48MHz when you correct to FCMEN instead of FCMEM. This is because the config settings I have given you set the PIC to run from 48MHz PLL clock source which is generated by the PIC internally but using your 20MHz crystal as the original clock source.

Hope this helps. Let us know how you get on.

Cheers

Rob

amenoera
- 19th March 2008, 04:20
woow , yes you are right .

all i did is :

1 : for this "symbol not previously defined (_fcmem_on_1h) " error , i changed it

to "(_fcmen_on_1h" .

2 : i comment this lines in "18f4550.inc" in my "pbp" folder :

; __CONFIG _CONFIG1L, _PLLDIV_5_1L & _CPUDIV_OSC1_PLL2_1L & _USBDIV_2_1L
; __CONFIG _CONFIG1H, _FOSC_HSPLL_HS_1H

this 2 line is reponsable for this erro "overwriting previous address contents (0000)"

3 : i change "define osc 20" to "48" .

after that , all works fine , and i can now send and recive without any problems .

thanks again .

regards .

Rob
- 19th March 2008, 08:15
Excellent,

glad it's working for you!

Kind regards

Rob

leelion
- 28th June 2017, 12:56
Hi Rob:
if pic18f4550 use 16Mhz crystal , how to set 'Config1L to get precise output timing ?

'Config1L
' Full-speed USB Clock Source Selection: Clock Source from 96MHz PLL/2
' CPU System Clock Postscaler: Prescaler Divide by 5 for 20MHz Crystal
' 96MHz Prescaler: Divide by 5 (20MHz Input)
@ __CONFIG _CONFIG1L, _USBDIV_2_1L & _CPUDIV_OSC1_PLL2_1L & _PLLDIV_5_1L

'Config1H
'Oscillator: HS oscillator, PLL enabled, HS used by USB
'Fail-Safe Clock Monitor Enable: Enabled
'Internal External Switch Over Mode: Disabled
@ __CONFIG _CONFIG1H, _FOSC_HSPLL_HS_1H & _FCMEM_ON_1H & _IESO_OFF_1H

thanks , regards
Lee

richard
- 29th June 2017, 04:35
first off this thread has been inactive for 9 years , is it even relevant to your problem ?



if pic18f4550 use 16Mhz crystal , how to set 'Config1L to get precise output timing ?

what output timing ?

what cpu clock are you aiming for ?
do you need usb clock ?

what version of pbp ?
setting config like this is ancient history

@ __CONFIG _CONFIG1L, _USBDIV_2_1L & _CPUDIV_OSC1_PLL2_1L & _PLLDIV_5_1L

why not start a new more relevant thread

leelion
- 30th June 2017, 13:14
first off this thread has been inactive for 9 years , is it even relevant to your problem ?




what output timing ?

what cpu clock are you aiming for ?
do you need usb clock ?

what version of pbp ?
setting config like this is ancient history


why not start a new more relevant thread

hello,
my complier is PBP3 gold 3.0.9.0
16Mhz crystal work with Pic18f4550
output timing means : if I toggle portB.4 200 , led should toggle every 200ms , but it output toggle only every 20ms , how can i set exactly config to get precise output ? thanks

Lee

richard
- 30th June 2017, 14:39
maybe you should post the actual code you are trying

toggle portB.4 200
is not a valid pbp statement

@ __CONFIG _CONFIG1L, _USBDIV_2_1L & _CPUDIV_OSC1_PLL2_1L & _PLLDIV_5_1L
is not a valid pbp3 statement


what cpu clock are you aiming for ?
do you need usb clock ?

did you define OSC?

leelion
- 1st July 2017, 06:34
Hi
my code is simple as follow:

define osc 48
TRISB = $00 ' Set digit pins to output
mainloop:
toggle portB.5
pause 200
Goto mainloop ' Forever

End

my complier is PBPX 3.0.9.4
16Mhz crystal work with Pic18f4550
I measure portB.5 output led by scope, it toggle only every 20ms , only 1/10 of my seeting , how can i set exactly config for 16MHz crystal application to get precise output ?
I check PBP3\Device\PIC18F4550.PBPINC file internal seting just for 20Mhz
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; The #CONFIG block is passed directly to the asm file, but PBP will replace it
; automagically with the contents of a user-defined #CONFIG block if one is
; found in the PBP source program. There is no need to edit or comment this
; block in this file. Simply copy it to your source program and edit it there.
#CONFIG
CONFIG PLLDIV = 5 ; Divide by 5 (20 MHz oscillator input)
CONFIG CPUDIV = OSC1_PLL2 ; [Primary Oscillator Src: /1][96 MHz PLL Src: /2]
CONFIG USBDIV = 2 ; USB clock source comes from the 96 MHz PLL divided by 2
CONFIG FOSC = HSPLL_HS ; HS oscillator, PLL enabled (HSPLL)
CONFIG FCMEN = OFF ; Fail-Safe Clock Monitor disabled
CONFIG IESO = OFF ; Oscillator Switchover mode disabled
CONFIG PWRT = OFF ; PWRT disabled
CONFIG BOR = ON ; Brown-out Reset enabled in hardware only (SBOREN is disabled)
CONFIG BORV = 3 ; Minimum setting
CONFIG VREGEN = ON ; USB voltage regulator enabled
CONFIG WDT = ON ; WDT enabled
CONFIG WDTPS = 512 ; 1:512
CONFIG CCP2MX = ON ; CCP2 input/output is multiplexed with RC1
CONFIG PBADEN = OFF ; PORTB<4:0> pins are configured as digital I/O on Reset
CONFIG LPT1OSC = OFF ; Timer1 configured for higher power operation
CONFIG MCLRE = ON ; MCLR pin enabled; RE3 input pin disabled
CONFIG STVREN = ON ; Stack full/underflow will cause Reset
CONFIG LVP = OFF ; Single-Supply ICSP disabled
CONFIG ICPRT = OFF ; ICPORT disabled
CONFIG XINST = OFF ; Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
CONFIG DEBUG = OFF ; Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins
CONFIG CP0 = OFF ; Block 0 (000800-001FFFh) is not code-protected
CONFIG CP1 = OFF ; Block 1 (002000-003FFFh) is not code-protected
CONFIG CP2 = OFF ; Block 2 (004000-005FFFh) is not code-protected
CONFIG CP3 = OFF ; Block 3 (006000-007FFFh) is not code-protected
CONFIG CPB = OFF ; Boot block (000000-0007FFh) is not code-protected
CONFIG CPD = OFF ; Data EEPROM is not code-protected
CONFIG WRT0 = OFF ; Block 0 (000800-001FFFh) is not write-protected
CONFIG WRT1 = OFF ; Block 1 (002000-003FFFh) is not write-protected
CONFIG WRT2 = OFF ; Block 2 (004000-005FFFh) is not write-protected
CONFIG WRT3 = OFF ; Block 3 (006000-007FFFh) is not write-protected
CONFIG WRTC = OFF ; Configuration registers (300000-3000FFh) are not write-protected
CONFIG WRTB = OFF ; Boot block (000000-0007FFh) is not write-protected
CONFIG WRTD = OFF ; Data EEPROM is not write-protected
CONFIG EBTR0 = OFF ; Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks
CONFIG EBTR1 = OFF ; Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks
CONFIG EBTR2 = OFF ; Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks
CONFIG EBTR3 = OFF ; Block 3 (006000-007FFFh) is not protected from table reads executed in other blocks
CONFIG EBTRB = OFF ; Boot block (000000-0007FFh) is not protected from table reads executed in other blocks
#ENDCONFIG
++++++++++++++++++++++++++++++++++++++++++++++++++ ++++
thanks

Lee

richard
- 1st July 2017, 07:56
when posting code please use code tags
http://www.picbasic.co.uk/forum/showthread.php?t=19594






#CONFIG
;wrong CONFIG PLLDIV = 5 ; Divide by 5 (20 MHz oscillator input)

CONFIG PLLDIV = 4 ; Divide by4 (16 MHz oscillator input)
CONFIG CPUDIV = OSC1_PLL2 ; [Primary Oscillator Src: /1][96 MHz PLL Src: /2]
CONFIG USBDIV = 2 ; USB clock source comes from the 96 MHz PLL divided by 2
CONFIG FOSC = HSPLL_HS ; HS oscillator, PLL enabled (HSPLL)
CONFIG FCMEN = OFF ; Fail-Safe Clock Monitor disabled
CONFIG IESO = OFF ; Oscillator Switchover mode disabled
CONFIG PWRT = OFF ; PWRT disabled
CONFIG BOR = ON ; Brown-out Reset enabled in hardware only (SBOREN is disabled)
CONFIG BORV = 3 ; Minimum setting
CONFIG VREGEN = ON ; USB voltage regulator enabled
CONFIG WDT = ON ; WDT enabled
CONFIG WDTPS = 512 ; 1:512
CONFIG CCP2MX = ON ; CCP2 input/output is multiplexed with RC1
CONFIG PBADEN = OFF ; PORTB<4:0> pins are configured as digital I/O on Reset
CONFIG LPT1OSC = OFF ; Timer1 configured for higher power operation
CONFIG MCLRE = ON ; MCLR pin enabled; RE3 input pin disabled
CONFIG STVREN = ON ; Stack full/underflow will cause Reset
CONFIG LVP = OFF ; Single-Supply ICSP disabled
CONFIG ICPRT = OFF ; ICPORT disabled
CONFIG XINST = OFF ; Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
CONFIG DEBUG = OFF ; Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins
CONFIG CP0 = OFF ; Block 0 (000800-001FFFh) is not code-protected
CONFIG CP1 = OFF ; Block 1 (002000-003FFFh) is not code-protected
CONFIG CP2 = OFF ; Block 2 (004000-005FFFh) is not code-protected
CONFIG CP3 = OFF ; Block 3 (006000-007FFFh) is not code-protected
CONFIG CPB = OFF ; Boot block (000000-0007FFh) is not code-protected
CONFIG CPD = OFF ; Data EEPROM is not code-protected
CONFIG WRT0 = OFF ; Block 0 (000800-001FFFh) is not write-protected
CONFIG WRT1 = OFF ; Block 1 (002000-003FFFh) is not write-protected
CONFIG WRT2 = OFF ; Block 2 (004000-005FFFh) is not write-protected
CONFIG WRT3 = OFF ; Block 3 (006000-007FFFh) is not write-protected
CONFIG WRTC = OFF ; Configuration registers (300000-3000FFh) are not write-protected
CONFIG WRTB = OFF ; Boot block (000000-0007FFh) is not write-protected
CONFIG WRTD = OFF ; Data EEPROM is not write-protected
CONFIG EBTR0 = OFF ; Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks
CONFIG EBTR1 = OFF ; Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks
CONFIG EBTR2 = OFF ; Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks
CONFIG EBTR3 = OFF ; Block 3 (006000-007FFFh) is not protected from table reads executed in other blocks
CONFIG EBTRB = OFF ; Boot block (000000-0007FFh) is not protected from table reads executed in other blocks
#ENDCONFIG
++++++++++++++++++++++++++++++++++++++++++++++++++ ++++



;wrong define osc 48 DEFINES ARE CASE SENSITIVE

define OSC 48
TRISB = $00 ' Set digit pins to output
mainloop:
toggle portB.5
pause 200
Goto mainloop ' Forever

End

leelion
- 1st July 2017, 14:55
Hi
Thanks , I tested PLLDIV = 4 before I posted .
if set PLLDIV = 4 , its output around 16.8ms , do you think any other setting was wrong ?

Best regards
Lee

richard
- 2nd July 2017, 00:12
if set PLLDIV = 4 , its output around 16.8ms

The input to the PLL needs to be 4MHz , 16/4 = 4

CPUDIV = OSC1_PLL2 yields a 48MHz CPU clock if the PLL is fed correctly




do you think any other setting was wrong ?

If you don't post you code [in code tags] I would only be guessing

leelion
- 2nd July 2017, 14:50
Hi
thanks Richard , my code as below


define osc 48
TRISB = $00 ' Set digit pins to output
mainloop:
toggle portB.5
pause 200
Goto mainloop ' Forever

End

richard
- 2nd July 2017, 15:00
your not paying attention the solution has already been offered , and for an issue like this its important to include the config section
config + program are inseparable for diagnosing this problem



define osc 48
TRISB = $00 ' Set digit pins to output
mainloop:
toggle portB.5
pause 200
Goto mainloop ' Forever

End


RTFM

;wrong define osc 48 DEFINES ARE CASE SENSITIVE
define OSC 48

Scampy
- 4th July 2017, 13:32
Just testing, as sometimes I've noticed that when pasting code copied from MCS into the forum, it sometimes re-formats it and changes upper to lower case

Just ignore this




DEFINE OSC 20 ' 18F4520, 20mhz crystal


Edit: - seems to work fine so it's not that, so must be human error ;-)

HenrikOlsson
- 4th July 2017, 14:26
In MCS keywords are reformatted on the fly - but for display purposes only. The case in which you type it in is what's stored in the actual file. If you typ HsERiN that's what stored when you save the file even if MCS displays HSERIN on the screen.

define is a keyword so when you type that in MCS it gets reformatted to upper case (if you have your formatting setup that way) but if you then copy/paste that into Notepad or whatever it reverts to the way you typed it (which can be DefINe or whatever). OSC on the other hand - which is the important thing here - is NOT a keyword that MCS recognizes so it does NOT get reformatted and that's a good thing in this case because if it did you'd see OSC on the screen even if you typed it as osc which would then cause the assembler to not recognize it as OSC.

/Henrik.