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Drake
- 12th October 2007, 15:07
I am currently working on a project that has to do with ultrasonic transducers. The problems I have is that i can't get WDT to stop reseting the pic and it is driving up the walls. I have tried a lot of different commands to stop the WDT and none so far have worked. Any help would be greatly appreciated.

this in the current config I am using:

asm
__CONFIG _CONFIG1H, _XT_OSC_1H
; HS osc (20 MHz
;
__CONFIG _CONFIG2L, _BOR_ON_2L & _BORV_27_2L & _PWRT_ON_2L
; Enable Brown out voltage detect
; Brown out voltage threshold 2.7 Volt
;
__CONFIG _CONFIG2H, _WDT_OFF_2H
; Disable watch dog timer
;
__CONFIG _CONFIG3H, _CCP2MX_OFF_3H
; Use default PORTC.1 for CCP2
;
__CONFIG _CONFIG4L, _STVR_ON_4L & _LVP_OFF_4L & _DEBUG_OFF_4L
; enable stack overflow
; disable low-voltage programming mode
; disable background debugger
;
__CONFIG _CONFIG5L, _CP0_OFF_5L & _CP1_OFF_5L & _CP2_OFF_5L & _CP3_OFF_5L
; disable code protect (user block)
;
__CONFIG _CONFIG5H, _CPB_OFF_5H & _CPD_OFF_5H
; disable code protect (boot block)
;
__CONFIG _CONFIG6L, _WRT0_OFF_6L & _WRT1_OFF_6L & _WRT2_OFF_6L & _WRT3_OFF_6L
; disable write protect (user block)
;
__CONFIG _CONFIG6H, _WRTC_OFF_6H & _WRTB_OFF_6H & _WRTD_OFF_6H
; disable Write protect CONFIG regs
; disable write protect boot block
; disable rite protect Data EE
;
__CONFIG _CONFIG7L, _EBTR0_OFF_7L
; Disable table Read protect user block
;
__CONFIG _CONFIG7H, _EBTRB_OFF_7H
; Disable Read protect boot block enable
endasm

mackrackit
- 12th October 2007, 16:25
Just a thought, maybe it is the BOR?

Drake
- 13th October 2007, 08:13
I found mistake pic is running again. Forgot to return out of one of the functions. Thanks anyway.