Log in

View Full Version : PIC18F45K22 Not working



Ioannis
- 15th February 2025, 17:08
Simple LED test but no joy. Cannot see why it is not working.

On PortB(0-3) there are 4 LEDs connected to ground and LED1 and LED2 are faint ON, rest OFF.



#CONFIG
CONFIG FOSC = INTIO67 ; Internal oscillator block
CONFIG PLLCFG = ON ; PLL Control
CONFIG PRICLKEN = OFF ; Primary clock can be disabled by software
CONFIG FCMEN = OFF ; Fail-Safe Clock Monitor disabled
CONFIG IESO = OFF ; Oscillator Switchover mode disabled
CONFIG PWRTEN = OFF ; Power up timer disabled
CONFIG BOREN = SBORDIS ; Brown-out Reset enabled in hardware only (SBOREN is disabled)
CONFIG BORV = 190 ; VBOR set to 1.90 V nominal
CONFIG WDTEN = OFF ; WDT is always enabled. SWDTEN bit has no effect
CONFIG WDTPS = 32768 ; 1:32768
CONFIG CCP2MX = PORTC1 ; CCP2 input/output is multiplexed with RC1
CONFIG PBADEN = OFF ; PORTB<5:0> pins are configured as digital I/O on Reset
CONFIG CCP3MX = PORTB5 ; P3A/CCP3 input/output is multiplexed with RB5
CONFIG HFOFST = ON ; HFINTOSC output and ready status are not delayed by the oscillator stable status
CONFIG T3CMX = PORTC0 ; T3CKI is on RC0
CONFIG P2BMX = PORTD2 ; P2B is on RD2
CONFIG MCLRE = INTMCLR ; MCLR pin disabled, RE3 input pin enabled
CONFIG STVREN = ON ; Stack full/underflow will cause Reset
CONFIG LVP = OFF ; Single-Supply ICSP disabled
CONFIG XINST = OFF ; Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
CONFIG DEBUG = OFF ; Disabled
CONFIG CP0 = OFF ; Block 0 (000800-001FFFh) not code-protected
CONFIG CP1 = OFF ; Block 1 (002000-003FFFh) not code-protected
CONFIG CP2 = OFF ; Block 2 (004000-005FFFh) not code-protected
CONFIG CP3 = OFF ; Block 3 (006000-007FFFh) not code-protected
CONFIG CPB = OFF ; Boot block (000000-0007FFh) not code-protected
CONFIG CPD = OFF ; Data EEPROM not code-protected
CONFIG WRT0 = OFF ; Block 0 (000800-001FFFh) not write-protected
CONFIG WRT1 = OFF ; Block 1 (002000-003FFFh) not write-protected
CONFIG WRT2 = OFF ; Block 2 (004000-005FFFh) not write-protected
CONFIG WRT3 = OFF ; Block 3 (006000-007FFFh) not write-protected
CONFIG WRTC = OFF ; Configuration registers (300000-3000FFh) not write-protected
CONFIG WRTB = OFF ; Boot Block (000000-0007FFh) not write-protected
CONFIG WRTD = OFF ; Data EEPROM not write-protected
CONFIG EBTR0 = OFF ; Block 0 (000800-001FFFh) not protected from table reads executed in other blocks
CONFIG EBTR1 = OFF ; Block 1 (002000-003FFFh) not protected from table reads executed in other blocks
CONFIG EBTR2 = OFF ; Block 2 (004000-005FFFh) not protected from table reads executed in other blocks
CONFIG EBTR3 = OFF ; Block 3 (006000-007FFFh) not protected from table reads executed in other blocks
CONFIG EBTRB = OFF ; Boot Block (000000-0007FFh) not protected from table reads executed in other blocks
#ENDCONFIG

' Setup PLL for 64 MHZ
OSCCON = %01110000 ; 16 mhz (NOTE: SCS=0 so PLL works)
OSCCON2 = %00000100
OSCTUNE = %01000000 ; PLL enable Mhz * 4

DEFINE OSC 64

ANSELA = 0
ANSELB = 0
ANSELC = 0
ANSELD = 0
ANSELE = 0

WPUB= 255

'Initializing Registers
porta=0:portb = 255:portc=0:portd=0:porte=0
trisa = 0
trisb.5=%00100000
portc.6=1
trisc.6=0
trisd = 0
trise = 0

'Variable set
but var portb.5

latb=0
while 1
latb.0=1:pause 100:latb.0=0:pause 100
wend

end


Ioannis

Ioannis
- 15th February 2025, 18:21
Do not bother... Found the embarrasing stupid mistake that blew the Port B all together!

Marked with bold red on the code above.

Ioannis

Demon
- 19th February 2025, 07:17
That was enough to damage the port?

Ioannis
- 19th February 2025, 08:00
I don't think this is something dangerous. It just did not setup the port properly and of course did not work as an output.

No damage at all.

Still very stupid mistake, not easy to see.

Ioannis