Weirdness with 16F1705's eeprom and DAC

[wjsmarine]

Hi Folks,

First time use of subject PIC chosen for its inbuilt 8bit DAC. Code below runs but throws compile errors with:
1 onboard eeprom (I'd really like to get this working).
2 can't use binary to set FVRCON (decimal works fine). This isn't a big deal but why the error and what does it mean?

Am I missing something obvious? I've RTFM but still scratching my head...

Thanks,
Bill




'************************************************* ********************************
'* Name : DACtest.pbp *
'* Date : 16/07/20 *
'* Device : 16F1705 *
'* Version : 1 (PBP 3.0.10.4) *
'************************************************* ********************************
'
'================================================= ================================================== ======
' CONFIGURE DEVICE
'================================================= ================================================== ======
#CONFIG ; 16F1705
__config _CONFIG1, _FOSC_INTOSC & _WDTE_ON & _PWRTE_ON & _MCLRE_ON & _CP_OFF & _BOREN_ON & _CLKOUTEN_OFF
__config _CONFIG2, _WRT_OFF & _PPS1WAY_OFF & _ZCDDIS_OFF & _PLLEN_OFF & _STVREN_ON & _BORV_LO & _LPBOR_OFF & _LVP_OFF
#ENDCONFIG

' Connections as follows:
' ****16F1705 PIC**** Comments
'
' Vdd (pin 1) 5 volts.
' RA5 (pin 2) T1clk. Spare.
' RA4 (pin 3) AN3, T1G. Spare.
' MCLR RA3 (pin 4) IOC. Pull High 10k. Spare.
' RC5 (pin 5) Opamp2in+, CCP1. Spare.
' RC4 (pin 6) Opamp2in-. Serout for monitoring (9600).
' RC3 (pin 7) AN7, Opamp2Out, CCP2. Serin for setting from laptop (9600).
' RC2 (pin 8) AN6, Opamp1Out. Spare.
' RC1 (pin 9) AN5, Opamp1in-. Spare.
' RC0 (pin 10) AN4, Opamp1in+. Spare.
' RA2 (pin 11) AN2, DAC1out2. Initial use with pot to adjust DAC output.
' ICSPclk RA1 (pin 12) AN1, Vref+. Spare.
' ICSPdat RA0 (pin 13) AN0, DAC1out1. Output voltage from DAC.
' Vss Ground (pin 14)

'================================================= ================================================== ======
' PIN ASSIGNMENTS, SYSTEM CONSTANTS, TEMPORARY VARIABLES
'================================================= ================================================== ======
' Alias pins
DAC1out var PortA.0 ' Output voltage from DAC via 1k.
Iset var PortA.2 ' Pot to adjust DAC output.
in_pin var PortC.3 ' serial in via 22k.
out_pin var PortC.4 ' serial out via 1k.

'================================================= ================================================== ======
' Variables
'================================================= ================================================== ======
pott var word ' 10bit value from pot.
Message var byte '
a var byte ' Loop counter.

'================================================= ================================================== ======
' Constants
'================================================= ================================================== ======
B96 CON 16468 ' Baudmode for 9600,8,N,1 inverted.

' -----[ Initialization ]----------------------------------------------------------------
' Stored onboard E2...
'#### Message below brings:
'[ERROR] dactest.pbp (58) : Syntax error
'[MESSAGE] pic16f1705.pbpinc(351): HPWM command only supports CCP channels (not PWM channels).

'Message Data "DACtest 16Jul20"

' Clear ' Reset all variables.

INCLUDE "modedefs.bas" ' Include serial modes.

DEFINE DEBUG_REG PORTC ' Debug pin port.
DEFINE DEBUG_BIT 4 ' Debug pin.
DEFINE DEBUG_BAUD 9600 ' Debug baud rate
DEFINE DEBUG_MODE 1 ' Debug mode: 0 = True, 1 = Inverted
' DEFINE DEBUG_PACING 1000 ' Debug character pacing in us
DEFINE DEBUGIN_BIT 3 ' Input pin.

DEFINE OSC 4 ' Adjust to suit design.
OSCCON = %01101011 ' Internal 4MHz osc.
' OSCCON = %01110011 ' Internal 8MHz osc.
' OSCCON = %01111011 ' Internal 16MHz osc.
' OSCCON = %11110011 ' Internal 32MHz osc PLL.

OPTION_REG.7 = 1 ' Disable weak pullups.
' OPTION_REG.7 = 0 ' Enable weak pullups.

DEFINE ADC_BITS 10 ' Set number of bits in result.
DEFINE ADC_CLOCK 3 ' Set clock source (rc = 3).
DEFINE ADC_SAMPLEUS 50 ' Set sampling time in microseconds.

' ADCON0 = 0 ' No ADC.
ADCON0 = %00000001 ' Enable ADC.
ADCON1 = %10000000 ' Right justify, Frc, use Vdd for Vref.
ADCON2 = %00000000 ' No Trigger selects.

ANSELA = %00000100 ' AN2 the rest Dig.
' ANSELA = 0 ' Disable ADC.
ANSELC = %00000000 ' All Dig.

CM1CON0 = 0 ' Comparators off.

' #### These Error if uncommented:
' FVRCON = $0 ' Disabled.
' FVRCON = $11000101 ' Enabled, Vref 1.024V, DAC1out1 (RA0).
' DAC1CON0 = $10101000 ' Vref from FVR.
' DAC1CON1 = $10000000 ' Set initial output value to 50% of Vref.
'[WARNING] dactest.pbp (100) : $11000101 Malformed binary numeric, value truncated
'[WARNING] dactest.pbp (101) : $10101000 Malformed binary numeric, value truncated
'[WARNING] dactest.pbp (102) : $10000000 Malformed binary numeric, value truncated
'[MESSAGE] pic16f1705.pbpinc(351): HPWM command only supports CCP channels (not PWM channels).

' These compile okay:
FVRCON = 197 ' Enabled, Vref 1.024V, DAC1out1 (RA0).
' FVRCON = 201 ' Enabled, Vref 2.048V, DAC1out1 (RA0).
' FVRCON = 205 ' Enabled, Vref 4.096V, DAC1out1 (RA0).
DAC1CON0 = 168 ' Vref from FVR.
DAC1CON1 = 128 ' Set initial output value to 50% of Vref.

TRISA = %000100 ' A.2 pot input.
TRISC = %001000 ' C.3 serial in.

Pause 1000 ' Short wait for things to settle.
debug "I'm Alive!", 13,10 ' Eureka moment.
pause 3000 ' Time enough to gloat.
goto First ' Jump subs.

'================================================= ================================================== ======
' Subroutines
'================================================= ================================================== ======

'================================================= ================================================== ======
' Main
'================================================= ================================================== ======
First:
for a = 0 to 255 step 7 ' Some coarse jumps.
DAC1CON1 = a
debug "DAC = ",#a,13,10 '
pause 2000 ' Let the DMM settle.
next
goto first ' Cycle.

end

[HenrikOlsson]

1) This device doesn't have on board EEPROM. Instead it's using a specific section of "program memory" for the same purpose. I don't think I've played around with that feature but my guess would be to use WRITECODE/READCODE/ERASECODE. Since this type of memory is erased in blocks you can't overwrite a single a byte, instead you need to read out the block, erase the block, then write it back again with the single (or more obviously) values changed.



' #### These Error if uncommented:
' FVRCON = $0 ' Disabled.
' FVRCON = $11000101 ' Enabled, Vref 1.024V, DAC1out1 (RA0).
' DAC1CON0 = $10101000 ' Vref from FVR.
' DAC1CON1 = $10000000 ' Set initial output value to 50% of Vref.

2) When writing numbers in binary you need to put a %-sign in front of it - not a $-sign which is used for hexadecimal. FVRCON = $0 would work though, are you saying it won't compile with that either?

[Sherbrook]

Yes it is something obvious


' FVRCON = $11000101 ' Enabled, Vref 1.024V, DAC1out1 (RA0).
should be
FVRCON = %11000101

Phil

[richard]

bill you might get some use from this re hef as eeprom

http://support.melabs.com/forum/picbasic-pro-compiler-3-0-and-later/asm-assembly-language-in-picbasic-pro/6753-accessing-hef

[wjsmarine]

Doh! Oh dear how basic a mistake is that?

I'm feeling very red-faced now for missing the obvious. I think a case of not seeing the forest with the trees in the way...

Thanks folks for showing me the way, TBH digging deeper shows these HEF chips have been around a while now and I'm surprised the PBPro improvement team (is there one?) haven't written anything to access HEF seamlessly - if I'm wrong please correct me.

Richard, check your in box I'll send you a PM shortly.

Cheers, stay safe,
Bill

[wjsmarine]

Hi Folks,

I went ahead and made a pcb for the application and during layout decided to use the alternate DAC output of RA2 instead of RA0 to keep it free for ICSP.

Of course after etching and populating the pcb I have some nonsense happening on RA2 despite correctly reconfiguring the DAC registers (at least I think so!). The code below compiles, loads and runs correctly when configured for RA0 but RA2 Sits at 2.277V with RA0 running correctly. When set for RA2 it sits about 700mV varying slightly and RA0 is at 0V as you'd expect.

Have I missed something or am I having another senior's moment? While I can hack my pcb to achieve a solution using RA0 I'd like to have the option of being able to use RA2 as it was intended.

Thanks, stay safe,
Bill





'************************************************* ********************************
'* Name : DACtest.pbp #### 1/2 Working code #### *
'* Date : 02/08/20 *
'* Device : 16F1705 *
'* Version : 1 (PBP 3.0.10.4) *
'************************************************* ********************************
'
'================================================= ================================================== ======
' CONFIGURE DEVICE
'================================================= ================================================== ======
#CONFIG ; 16F1705
__config _CONFIG1, _FOSC_INTOSC & _WDTE_ON & _PWRTE_ON & _MCLRE_ON & _CP_OFF & _BOREN_ON & _CLKOUTEN_OFF
__config _CONFIG2, _WRT_OFF & _PPS1WAY_OFF & _ZCDDIS_OFF & _PLLEN_OFF & _STVREN_ON & _BORV_LO & _LPBOR_OFF & _LVP_OFF
#ENDCONFIG

' Connections as follows:
' ****16F1705 PIC**** Comments
'
' Vdd (pin 1) 5 volts.
' RA5 (pin 2) T1clk. Spare.
' RA4 (pin 3) AN3, T1G. Spare.
' MCLR RA3 (pin 4) IOC. Pull High 10k. Spare.
' RC5 (pin 5) Opamp2in+, CCP1. Spare.
' RC4 (pin 6) Opamp2in-. Serin for setting from laptop (9600).
' RC3 (pin 7) AN7, Opamp2Out, CCP2. Serout for monitoring (9600).
' RC2 (pin 8) AN6, Opamp1Out. Spare.
' RC1 (pin 9) AN5, Opamp1in-. Spare.
' RC0 (pin 10) AN4, Opamp1in+. Spare.
' RA2 (pin 11) AN2, DAC1out2. DAC alternate output.
' ICSPclk RA1 (pin 12) AN1, Vref+. Spare.
' ICSPdat RA0 (pin 13) AN0, DAC1out1. Default output voltage from DAC.
' Vss Ground (pin 14)

'================================================= ================================================== ======
' PIN ASSIGNMENTS, SYSTEM CONSTANTS, TEMPORARY VARIABLES
'================================================= ================================================== ======
' Alias pins

'================================================= ================================================== ======
' Variables
'================================================= ================================================== ======
a var byte ' Loop counter.

'================================================= ================================================== ======
' Constants
'================================================= ================================================== ======

' -----[ Initialization ]----------------------------------------------------------------

' Clear ' Reset all variables.

INCLUDE "modedefs.bas" ' Include serial modes.

DEFINE DEBUG_REG PORTC ' Debug pin port.
DEFINE DEBUG_BIT 3 ' Debug pin.
DEFINE DEBUG_BAUD 9600 ' Debug baud rate
DEFINE DEBUG_MODE 1 ' Debug mode: 0 = True, 1 = Inverted
' DEFINE DEBUG_PACING 1000 ' Debug character pacing in us
DEFINE DEBUGIN_BIT 4 ' Input pin.

DEFINE OSC 4 ' Adjust to suit design.
OSCCON = %01101011 ' Internal 4MHz osc.
' OSCCON = %01110011 ' Internal 8MHz osc.
' OSCCON = %01111011 ' Internal 16MHz osc.
' OSCCON = %11110011 ' Internal 32MHz osc PLL.

OPTION_REG.7 = 1 ' Disable weak pullups.
' OPTION_REG.7 = 0 ' Enable weak pullups.

' DEFINE ADC_BITS 10 ' Set number of bits in result.
' DEFINE ADC_CLOCK 3 ' Set clock source (rc = 3).
' DEFINE ADC_SAMPLEUS 50 ' Set sampling time in microseconds.

ADCON0 = 0 ' No ADC.
' ADCON0 = %00000001 ' Enable ADC.
' ADCON1 = %10000000 ' Right justify, Frc, use Vdd for Vref.
' ADCON2 = %00000000 ' No Trigger selects.

ANSELA = 0 ' Disable ADC.
' ANSELA = %00000100 ' AN2 the rest Dig.
' ANSELC = %00000000 ' All Dig.

CM1CON0 = 0 ' Comparators off.

' FVRCON = %0 ' Disabled.
FVRCON = %11000101 ' Enabled, Vref 1.024V.
' DAC1CON0 = %10101000 ' Vref from FVR, DAC1out1 (RA0).
'================================================= ================================================== ======
' ####### RA2 Sits at 2.277V with RA0 selected and running correctly.
DAC1CON0 = %10011000 ' Vref from FVR, DAC1out2 (RA2).
'================================================= ================================================== ======
' DAC1CON0 = %10111000 ' Vref from FVR, both outputs (RA0, RA2). [Not sure if this is possible]
DAC1CON1 = %10000000 ' Set initial output value to 50% of Vref.

TRISA = %000000 ' All output.
TRISC = %010000 ' C.4 serial in.

latC.3 = 0 ' Else first serial chars can be garbled...
Pause 1000 ' Short wait for things to settle.
debug "I'm Alive!", 13,10 ' Eureka moment.
pause 3000 ' Time enough to gloat.
goto First ' Jump subs.

'================================================= ================================================== ======
' Subroutines
'================================================= ================================================== ======

'================================================= ================================================== ======
' Main
'================================================= ================================================== ======
First:
for a = 0 to 255 step 7 ' Some coarse jumps.
DAC1CON1 = a
debug "DAC = ",#a,13,10 '
pause 2000 ' Let the DMM settle.
next
goto first ' Cycle.

end

[mpgmike]

Try ANSELA = 5 ;%00000101, Configures RA0 & RA2 as Analog

[richard]

not sure what your expecting from the output , it works for men on out 2
i used this code / with fvr and vdd for vsource+ both work
the pickit3 i used did not seem to load the out2 pin so i left it connected for tests

i did make portc digital . i also tried setting out2 pin as an input ,it makes no difference either way making it analog is not relevent


;************************************************* *******************************'* Name : DACtest.pbp #### 1/2 Working code #### *
'* Date : 02/08/20 *
'* Device : 16F1705 *
'* Version : 1 (PBP 3.0.10.4) *
'************************************************* ********************************
'
'================================================= ================================================== ======
' CONFIGURE DEVICE
'================================================= ================================================== ======
#CONFIG ; 16F1705
__config _CONFIG1, _FOSC_INTOSC & _WDTE_ON & _PWRTE_ON & _MCLRE_ON & _CP_OFF & _BOREN_ON & _CLKOUTEN_OFF
__config _CONFIG2, _WRT_OFF & _PPS1WAY_OFF & _ZCDDIS_OFF & _PLLEN_OFF & _STVREN_ON & _BORV_LO & _LPBOR_OFF & _LVP_OFF
#ENDCONFIG


' Connections as follows:
' ****16F1705 PIC**** Comments
'
' Vdd (pin 1) 5 volts.
' RA5 (pin 2) T1clk. Spare.
' RA4 (pin 3) AN3, T1G. Spare.
' MCLR RA3 (pin 4) IOC. Pull High 10k. Spare.
' RC5 (pin 5) Opamp2in+, CCP1. Spare.
' RC4 (pin 6) Opamp2in-. Serin for setting from laptop (9600).
' RC3 (pin 7) AN7, Opamp2Out, CCP2. Serout for monitoring (9600).
' RC2 (pin 8) AN6, Opamp1Out. Spare.
' RC1 (pin 9) AN5, Opamp1in-. Spare.
' RC0 (pin 10) AN4, Opamp1in+. Spare.
' RA2 (pin 11) AN2, DAC1out2. DAC alternate output.
' ICSPclk RA1 (pin 12) AN1, Vref+. Spare.
' ICSPdat RA0 (pin 13) AN0, DAC1out1. Default output voltage from DAC.
' Vss Ground (pin 14)


'================================================= ================================================== ======
' PIN ASSIGNMENTS, SYSTEM CONSTANTS, TEMPORARY VARIABLES
'================================================= ================================================== ======
' Alias pins


'================================================= ================================================== ======
' Variables
'================================================= ================================================== ======
a var byte ' Loop counter.
b var byte[8]
'================================================= ================================================== ======
' Constants
'================================================= ================================================== ======

' -----[ Initialization ]----------------------------------------------------------------


' Clear ' Reset all variables.


INCLUDE "modedefs.bas" ' Include serial modes.

DEFINE DEBUG_REG PORTC ' Debug pin port.
DEFINE DEBUG_BIT 3 ' Debug pin.
DEFINE DEBUG_BAUD 9600 ' Debug baud rate
DEFINE DEBUG_MODE 1 ' Debug mode: 0 = True, 1 = Inverted
' DEFINE DEBUG_PACING 1000 ' Debug character pacing in us
DEFINE DEBUGIN_BIT 4 ' Input pin.


DEFINE OSC 4 ' Adjust to suit design.
OSCCON = %01101011 ' Internal 4MHz osc.
' OSCCON = %01110011 ' Internal 8MHz osc.
' OSCCON = %01111011 ' Internal 16MHz osc.
' OSCCON = %11110011 ' Internal 32MHz osc PLL.


OPTION_REG.7 = 1 ' Disable weak pullups.
' OPTION_REG.7 = 0 ' Enable weak pullups.


' DEFINE ADC_BITS 10 ' Set number of bits in result.
' DEFINE ADC_CLOCK 3 ' Set clock source (rc = 3).
' DEFINE ADC_SAMPLEUS 50 ' Set sampling time in microseconds.


ADCON0 = 0 ' No ADC.
' ADCON0 = %00000001 ' Enable ADC.
' ADCON1 = %10000000 ' Right justify, Frc, use Vdd for Vref.
' ADCON2 = %00000000 ' No Trigger selects.


ANSELA = 0 ' Disable ADC.
' ANSELA = %00000100 ' AN2 the rest Dig.
ANSELC = %00000000 ' All Dig.


CM1CON0 = 0 ' Comparators off.


' FVRCON = %0 ' Disabled.
FVRCON = %11000101 ' Enabled, Vref 1.024V.
' DAC1CON0 = %10101000 ' Vref from FVR, DAC1out1 (RA0).
'================================================= ================================================== ======
' ####### RA2 Sits at 2.277V with RA0 selected and running correctly.
DAC1CON0 = %10010000 ' Vref from FVR, DAC1out2 (RA2).
'================================================= ================================================== ======
' DAC1CON0 = %10111000 ' Vref from FVR, both outputs (RA0, RA2). [Not sure if this is possible]
DAC1CON1 = %10000000 ' Set initial output value to 50% of Vref.


TRISA = %000000 ' All output.
TRISC = %010100 ' C.4 serial in.


latC.3 = 0 ' Else first serial chars can be garbled...
Pause 1000 ' Short wait for things to settle.
debug "I'm Alive!", 13,10 ' Eureka moment.
pause 3000 ' Time enough to gloat.

b[0]=128
b[1]=192
b[2]=255
b[3]=192
b[4]=128
b[5]=40
b[6]=0
b[7]=40
'================================================= ================================================== ======
' Subroutines
'================================================= ================================================== ======


'================================================= ================================================== ======
' Main
'================================================= ================================================== ======
First:
a=7
while a
DAC1CON1 = b[a]
;debug "DAC = ",#a,13,10 '
pause 5 ' Let the DMM settle.
a=a-1
wend
goto first ' Cycle.


end
8916

[wjsmarine]

Hi Richard,

Thanks for looking into this.

I edited my previous code to match yours and the results are crazy - see both 'scope captures below. RA2 is changing the right steps but is offset by about 700mV.

Only difference to code between the two is altering DAC1CON0 to achieve the change in output pin. I thought I might have a dud PIC so changed it but no difference...

Any ideas?

Cheers,
Bill

[richard]

new code without all the noisy comment

with both outputs driven , from fvr buff2 @2.048v [1.024v got weird results]
the unmentioned feature in data sheet is that out2 is complement of out1 and the gain seems a bit different
ps blue trace is dacout1



#CONFIG ; 16F1705
__config _CONFIG1, _FOSC_INTOSC & _WDTE_ON & _PWRTE_ON & _MCLRE_ON & _CP_OFF & _BOREN_ON & _CLKOUTEN_OFF
__config _CONFIG2, _WRT_OFF & _PPS1WAY_OFF & _ZCDDIS_OFF & _PLLEN_OFF & _STVREN_ON & _BORV_LO & _LPBOR_OFF & _LVP_OFF
#ENDCONFIG


a var byte ' Loop counter.
b var byte[8]






DEFINE OSC 4 ' Adjust to suit design.
OSCCON = $68 ' Internal 4MHz osc.




ANSELA = 0
ANSELC = 0


FVRCON = %10001000 ' Enabled, Vref 2.048V.



DAC1CON0 = %10111000 ' Vref from FVRb2, DAC1out2 (RA2). DAC1out1 (RA0).


TRISA = 0




b[0]=128
b[1]=192
b[2]=255
b[3]=192
b[4]=128
b[5]=40
b[6]=0
b[7]=40


First:
a=7
while a
DAC1CON1 = b[a]
pause 5 ' Let the DMM settle.
a=a-1
wend
goto first


end

[wjsmarine]

Yes, same as yours Richard.

As a side note I looked at substituting the 16F1705 with a 16F1614 but it only has out1, again on RA0 so did not proceed.

But out2 for me (1705) continues to have the DAC variation superimposed on a 700mV offset no matter what gain I have (x1,2 or 4). The comlementary/inverted output appears to be an undocumented "feature", may have its uses down the track, although I don't understand why the difference in gain between the two.

I tried an external Vref of 1.2V (LM385) and the waveforms appear stunted - may be due I didn't buffer the ref output - however the offset remains and this is the key problem.

Only when I used Vdd as Vref did the offset disappear but in the intended application I need the 1.024V reference, so Vdd is useless. I can use an external DAC (and get some greater resolution at the same time) but it defeats the purpose of using an all-in-one PIC in the first place, plus the pcb is already done albeit a prototype for my needs so I can hack it to use out1.

I won't waste anyone else's time pursuing this further, it is what it is - warts and all...

Cheers, stay safe,
Bill

[richard]

theres more to than i first thought.
i tried the microchip example in mplabx , guess what both pins are exactly equal and produce the exact predicted output by the datasheet,
we are missing something


#CONFIG ; 16F1705 __config _CONFIG1, _FOSC_INTOSC & _WDTE_ON & _PWRTE_ON & _MCLRE_ON & _CP_OFF & _BOREN_ON & _CLKOUTEN_OFF
__config _CONFIG2, _WRT_OFF & _PPS1WAY_OFF & _ZCDDIS_OFF & _PLLEN_OFF & _STVREN_ON & _BORV_LO & _LPBOR_OFF & _LVP_OFF
#ENDCONFIG


counts var byte ' Loop counter.






DEFINE OSC 4 ' Adjust to suit design.
OSCCON = $68 ' Internal 4MHz osc.




ANSELA = 0
ANSELC = 0






' ####### RA2 Sits at 2.277V with RA0 selected and running correctly.
DAC1CON0 = %10110000 ' Vref from FVRb2, DAC1out2 (RA2).











First:
for counts= 0 to 250
DAC1CON1 = counts
pause 5 ' Let the DMM settle.
next
goto first


end



void main(void){
// initialize the device
SYSTEM_Initialize();


// When using interrupts, you need to set the Global and Peripheral Interrupt Enable bits
// Use the following macros to:


// Enable the Global Interrupts
//INTERRUPT_GlobalInterruptEnable();


// Enable the Peripheral Interrupts
//INTERRUPT_PeripheralInterruptEnable();


// Disable the Global Interrupts
//INTERRUPT_GlobalInterruptDisable();


// Disable the Peripheral Interrupts
//INTERRUPT_PeripheralInterruptDisable();
uint8_t count=0;



while (1)
{
for(count=0; count<=250; count++)
{
DAC_SetOutput(count);
__delay_ms(5);


}
}
}
/**
End of File

void DAC_Initialize(void)
{
// DAC1EN enabled; DAC1NSS VSS; DAC1PSS VDD; DAC1OE1 enabled; DAC1OE2 enabled;
DAC1CON0 = 0xB0;
// DAC1R 51;
DAC1CON1 = 0x33;
}


void DAC_SetOutput(uint8_t inputData)
{
DAC1CON1 = inputData;
}


uint8_t DAC_GetOutput(void)
{
return DAC1CON1;
}


// CONFIG1
#pragma config FOSC = INTOSC // Oscillator Selection Bits->INTOSC oscillator: I/O function on CLKIN pin
#pragma config WDTE = OFF // Watchdog Timer Enable->WDT disabled
#pragma config PWRTE = OFF // Power-up Timer Enable->PWRT disabled
#pragma config MCLRE = ON // MCLR Pin Function Select->MCLR/VPP pin function is MCLR
#pragma config CP = OFF // Flash Program Memory Code Protection->Program memory code protection is disabled
#pragma config BOREN = ON // Brown-out Reset Enable->Brown-out Reset enabled
#pragma config CLKOUTEN = OFF // Clock Out Enable->CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin
#pragma config IESO = ON // Internal/External Switchover Mode->Internal/External Switchover Mode is enabled
#pragma config FCMEN = ON // Fail-Safe Clock Monitor Enable->Fail-Safe Clock Monitor is enabled


// CONFIG2
#pragma config WRT = OFF // Flash Memory Self-Write Protection->Write protection off
#pragma config PPS1WAY = ON // Peripheral Pin Select one-way control->The PPSLOCK bit cannot be cleared once it is set by software
#pragma config ZCDDIS = ON // Zero-cross detect disable->Zero-cross detect circuit is disabled at POR the culprit
#pragma config PLLEN = OFF // Phase Lock Loop enable->4x PLL is enabled when software sets the SPLLEN bit
#pragma config STVREN = ON // Stack Overflow/Underflow Reset Enable->Stack Overflow or Underflow will cause a Reset
#pragma config BORV = LO // Brown-out Reset Voltage Selection->Brown-out Reset Voltage (Vbor), low trip point selected.
#pragma config LPBOR = OFF // Low-Power Brown Out Reset->Low-Power BOR is disabled
#pragma config LVP = ON // Low-Voltage Programming Enable->Low-voltage programming enabled




void PIN_MANAGER_Initialize(void)
{
/**
LATx registers
*/
LATA = 0x00;
LATC = 0x00;


/**
TRISx registers
*/
TRISA = 0x37;
TRISC = 0x3F;


/**
ANSELx registers
*/
ANSELC = 0x3F;
ANSELA = 0;//0x17;


/**
WPUx registers
*/
WPUA = 0x00;
WPUC = 0x00;
OPTION_REGbits.nWPUEN = 1;


/**
ODx registers
*/
ODCONA = 0x00;
ODCONC = 0x00;


/**
SLRCONx registers
*/
SLRCONA = 0x37;
SLRCONC = 0x3F;


/**
INLVLx registers
*/
INLVLA = 0x3F;
INLVLC = 0x3F;












}

void SYSTEM_Initialize(void)
{


PIN_MANAGER_Initialize();
OSCILLATOR_Initialize();
WDT_Initialize();
DAC_Initialize();
}


void OSCILLATOR_Initialize(void)
{
// SCS FOSC; SPLLEN disabled; IRCF 4MHz_HF;
OSCCON = 0x68;
// SOSCR disabled;
OSCSTAT = 0x00;
// TUN 0;
OSCTUNE = 0x00;
// SBOREN disabled; BORFS disabled;
BORCON = 0x00;
}


void WDT_Initialize(void)
{
// WDTPS 1:65536; SWDTEN OFF;
WDTCON = 0x16;
}

[richard]

found it

config use _ZCDDIS_ON



#CONFIG ; 16F1705 __config _CONFIG1, _FOSC_INTOSC & _WDTE_ON & _PWRTE_ON & _MCLRE_ON & _CP_OFF & _BOREN_ON & _CLKOUTEN_OFF
__config _CONFIG2, _WRT_OFF & _PPS1WAY_OFF & _ZCDDIS_ON & _PLLEN_OFF & _STVREN_ON & _BORV_LO & _LPBOR_OFF & _LVP_OFF
#ENDCONFIG


counts var byte ' Loop counter.






DEFINE OSC 4 ' Adjust to suit design.
OSCCON = $68 ' Internal 4MHz osc.

ANSELA = 0
ANSELC = 0





DAC1CON0 = %10110000 ' Vref from vdd, DAC1out2 (RA2). DAC1out1 (RA0).











First:
for counts= 0 to 250
DAC1CON1 = counts
pause 5
next
goto first


end

[wjsmarine]

Woohoo! I just confirmed it with my 'scope.

You are the man Richard. Put a star up against your name mate!

Thanks again for your help, appreciated.

Kind regards,
Bill