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MikeBZH
- 5th April 2018, 18:11
Hi everybody,

I am trying to replace a 18F2685 by an 18F26K22 on an old design.
Everything should be compatible providing a correct configuration of my new PIC.
But the new CONFIG is more complex than with the old one.

Moreover I need to use a PicKit3 instead of a PicKit2 but this should not be a problem.

I am using an external 8 MHz xtal and I do not need any BOR reset, stack overflow reset, watch dog, etc..
I do not care about code protection

I have built my CONFIG accordingly with the help of the .INFO file.

I can program my device, but the program does not work.
When I try to debug, MPLAB IDE slows, sometime hangs, and after a few seconds displays a message :



PK3Err0040: The target device is not ready for debugging.
Please check your configuration bit settings and program
the device before proceeding.


I suspect that my CONFIG is not appropriate. Please see the attached file.

I am surprised by at least two things :
IESO is OFF by default. Am I right if I set it ON ?
What about DEBUG. ON, OFF, managed by the debug program ?

I have tryied several combinations but no way.

Can you see any obvious issue in my CONFIG file ?

Thank you for your help.

MikeBZH

tumbleweed
- 5th April 2018, 20:05
I'd try changing these to start with:


CONFIG PLLCFG = OFF ; Oscillator used directly
CONFIG IESO = OFF ; Oscillator Switchover mode disabled
CONFIG DEBUG = OFF ; Disabled


DEBUG is controlled from within MPLAB when you program it for debugging.

Usually "The target device is not ready for debugging" is an osc issue.

towlerg
- 5th April 2018, 22:01
FWIW if you want to use your Pickit2, heres a modified PK2DeviceFile which can programme 18F26K22 and a couple of simple apps for manipulating the dat file.

MikeBZH
- 6th April 2018, 15:10
Many thanks tumbleweed, it works now !

I can't understand why Microchip make such complex thinks sometimes :tongue:
"Keep it simple" should be the rule !

George, would your mods for the PicKit2 provide also the debug capability or only programming ?

Best regards
MikeBZH

Charlie
- 6th April 2018, 15:20
If you are really using a crystal then you need FOSC = LP (or the correct setting for a low power crystal with your device.)
Your file is set for a medium power high speed resonator

tumbleweed
- 6th April 2018, 16:39
LP, XT, and HS settings are all for use with crystals.
See section 2.5.3 in the datasheet.

towlerg
- 6th April 2018, 18:31
@Mike. No, just stand alone PK2cmd.exe and Pickit2v2.exe.

For what it's worth the config I use (in Proton but easily transposed)

' internal clock 16MHz with 4xPLL = 64MHz
$if _device = _18F26K22
Config_Start
FOSC = INTIO67 ; Internal oscillator block
PLLCFG = On ; Oscillator multiplied by 4
PRICLKEN = On ; Primary clock enabled
FCMEN = OFF ; Fail-Safe Clock Monitor disabled
IESO = OFF ; Oscillator Switchover mode disabled
PWRTEN = On ; Power up timer enabled
BOREN = On ; Brown-out Reset enabled and controlled by software (SBOREN is enabled)
BORV = 285 ; VBOR set to 2.85 V nominal
WDTEN = OFF ; Watch dog timer is always disabled. SWDTEN has no effect.
WDTPS = 32768 ; 1:32768
CCP2MX = PORTC1 ; CCP2 input/output is multiplexed with RC1
PBADEN = OFF ; PORTB<5:0> pins are configured as digital I/O on Reset
CCP3MX = PORTB5 ; P3A/CCP3 input/output is multiplexed with RB5
HFOFST = On ; HFINTOSC output and ready status are not delayed by the oscillator stable status
T3CMX = PORTC0 ; T3CKI is on RC0
P2BMX = PORTB5 ; P2B is on RB5
MCLRE = INTMCLR ; RE3 input pin enabled; MCLR disabled
STVREN = On ; Stack full/underflow will cause Reset
LVP = OFF ; Single-Supply ICSP disabled
XINST = OFF ; Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
Debug = OFF ; Disabled
Cp0 = OFF ; Block 0 (000800-003FFFh) not code-protected
CP1 = OFF ; Block 1 (004000-007FFFh) not code-protected
CP2 = OFF ; Block 2 (008000-00BFFFh) not code-protected
CP3 = OFF ; Block 3 (00C000-00FFFFh) not code-protected
CPB = OFF ; Boot block (000000-0007FFh) not code-protected
CPD = OFF ; Data EEPROM not code-protected
WRT0 = OFF ; Block 0 (000800-003FFFh) not write-protected
WRT1 = OFF ; Block 1 (004000-007FFFh) not write-protected
WRT2 = OFF ; Block 2 (008000-00BFFFh) not write-protected
WRT3 = OFF ; Block 3 (00C000-00FFFFh) not write-protected
WRTC = OFF ; Configuration registers (300000-3000FFh) not write-protected
WRTB = OFF ; Boot Block (000000-0007FFh) not write-protected
WRTD = OFF ; Data EEPROM not write-protected
EBTR0 = OFF ; Block 0 (000800-003FFFh) not protected from table reads executed in other blocks
EBTR1 = OFF ; Block 1 (004000-007FFFh) not protected from table reads executed in other blocks
EBTR2 = OFF ; Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks
EBTR3 = OFF ; Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks
EBTRB = OFF ; Boot Block (000000-0007FFh) not protected from table reads executed in other blocks
Config_End
$endif

Dave
- 6th April 2018, 20:56
MikeBZH, Here is the config I use for almost all of my 26K22 projects: 64Mhz internal OSC.

#CONFIG
;----- CONFIG1H Options --------------------------------------------------
__config _CONFIG1H, _FOSC_INTIO7_1H & _PLLCFG_ON_1H & _PRICLKEN_ON_1H & _FCMEN_ON_1H & _IESO_OFF_1H
;----- CONFIG2L Options --------------------------------------------------
__config _CONFIG2L, _PWRTEN_ON_2L & _BOREN_ON_2L & _BORV_190_2L
;----- CONFIG2H Options --------------------------------------------------
__config _CONFIG2H, _WDTEN_OFF_2H & _WDTPS_32768_2H
;----- CONFIG3H Options --------------------------------------------------
__config _CONFIG3H, _CCP2MX_PORTB3_3H & _PBADEN_OFF_3H & _HFOFST_OFF_3H & _T3CMX_PORTB5_3H & _MCLRE_EXTMCLR_3H
;----- CONFIG4L Options --------------------------------------------------
__config _CONFIG4L, _STVREN_ON_4L & _LVP_OFF_4L & _XINST_OFF_4L & _DEBUG_OFF_4L
#ENDCONFIG

Charlie
- 7th April 2018, 15:31
Tumbleweed - You're right - I should have looked it up instead of going by memory.

MikeBZH
- 8th April 2018, 07:38
Thank you Dave,

I need some frequency accuracy. This is why I don't use the internal oscillator but an external xtal and in that case the CONFIG is a little bit different.

But this issue is fixed now.

I am now faced with reading the port A digital inputs. Quite simple question but for an unknown reason it behaves differently than with the 18F2685.

73
MikeBZH (F8DFN)

tumbleweed
- 8th April 2018, 09:36
I am now faced with reading the port A digital inputs
Both devices have analog functions on portA but the function is selected differently.
On the 2685 you use the ADCON1 register, while with the 26K22 it's set with the ANSELA register.

Dave
- 8th April 2018, 13:15
Mike, here is the setup for one of my projects:

ANSELA = %00101111 'PORTS A5,A3,A2,A1,A0 ALALOG, A7,A6,A4 DIGITAL
ANSELB = %00100000 'PORTS B7,B6,B4,B3,B2,B1,B0 DIGITAL BUFFERED, B5 ANALOG
ANSELC = %00000000 'PORTS C7,C6,C5,C4,C3,C2,C1,C0 DIGITAL BUFFERED

Hope this helps...

astanapane
- 2nd July 2018, 12:20
im also having issues to understand the configuration fuses of the PIC18F26K22. I believe that microchip would like to give you more access for each peripheral, but for us it makes it more complicated. It should be straight forward. In the manual it is not cleared what are the right configuration bits needs to be set. Especially the ones covers the OSCCON, OSCCON2 and OSCTUNE.

For internal use of OSC and 4xPLL it is a bit more clear. But i'm really confused for the external OSC. This is what i have set up to now in this thread. Thanks to Ioannis and to Richard helping me out.

http://www.picbasic.co.uk/forum/showthread.php?t=23951&p=143982#post143982

It would be nice if we could have a clear configuration of the internal and external use of osc with 4x PLL.

thanks a lot.