Programming RFM radio modules in Basic

[camerart]

Hi,
I would like to program RFM69W radio modules in BASIC and hope for some help please.
Eventually the modules will be programmed using a PIC, but to start with I would like to 'talk' to them via FTDI serial to USB adaptors, just to see some results.
Can anyone help please?
Cheers, Camerart.

[richard]

rfm69 and rfm12 modules don't work that way , they retain no settings when powered off so they to be fully configured every power up .
they communicate via spi bus to the host and are most suited to packet transmissions . they can do ook but why would you
I use rfm12 and 69's a lot they are very reliable fast and have a good range ,but they are not for the faint hearted

[camerart]

rfm69 and rfm12 modules don't work that way , they retain no settings when powered off so they to be fully configured every power up .
they communicate via spi bus to the host and are most suited to packet transmissions . they can do ook but why would you
I use rfm12 and 69's a lot they are very reliable fast and have a good range ,but they are not for the faint hearted

Hi Richard,
I'm picking my way through the clues! And there don't seem many clues:)

OK, so I need a circuit with the module plus a PIC for configuring them.

It's something I want to do so I'll have to find out how faint hearted I am.

I would appreciate any circuits or minimal programs please. As for programs, I only speak in BASIC, so I bet I also have to translate any:(

Cheers, Camerart.

[richard]

here's a pgm I did some years back to let my pic projects talk to the Arduino things its based on and compatible with the Arduino

rfm12b lowpowerlab library. I would not develop anything new with rfm12b's , rfm69's are much better once you get the knack of it

I have developed libraries for pic, Arduino and raspberry_pi's [python2.7] to all yak to each other with rfm69 modules [rfm12b also] but
they are complex ,undocumented and beyond my resources to support for novices









'************************************************* ***************
'* Name : rfm12b.BAS *
'* Author : richard *
'* Notice : Copyright (c) 2013 *
'* : All Rights Reserved *
'* Date : 9/4/2013 *
'* Version : 1.0 16f1825 @3.3 volts *
'* Notes : talk to arduino rfm12b lib with encrypt=null *
'* : pkt size up to maxl , will ack also *
'************************************************* ***************

#CONFIG
__config _CONFIG1, _FOSC_INTOSC & _CP_OFF & _WDTE_ON & _PWRTE_ON & _MCLRE_ON & _CLKOUTEN_OFF
__config _CONFIG2, _PLLEN_ON & _LVP_OFF
#ENDCONFIG


include "dt_ints-14.bas"
Include "REENTERPBP.bas"
asm
INT_LIST macro



INT_HANDLER INT_INT, _RX, PBP ,NO
endm
INT_CREATE



ENDASM

DEFINE OSC 32
SSPIF VAR PIR1.3 ' SPI interrupt flag
ssc var PORTC.3 ;..... rf12b ss
RNINT VAR PORTA.2 ;.... rf12b irqn // int int
;SDI= PORTC.1 .... rf12b sdo
;SDO PORTC.2 .... rf12b sd1
;SCK PORTC.3 .... rf12b ssk
net con 99
node con 2
MAXL CON 34 ;buffer size ie 0 to 34


RXBUFF VAR BYTE[maxl+1]
BCNT VAR BYTE
GRP VAR RXBUFF[0] ;net sync
DEST VAR RXBUFF[1]
SOURCE VAR RXBUFF[2]
LEN VAR RXBUFF[3]
;data rxbuff[4] to rxbuff[maxl-2]
FLG VAR BYTE
RXDONE VAR FLG.7
CMD VAR WORD
crc var word
CRC_IN var byte
i VAR BYTE ' loop counter
j var byte



OSCCON=$70
ANSELA=0
ANSELC=0
OPTION_REG.6=0


TRISA = %001110
TRISC = %00000010 ' set PORTC I/O
SSP1CON1=$21 ;$22 works too
SSP1CON2=0
SSP1CON3=0
SSP1STAT=$40

high ssc '
serout2 PORTA.0,84,[ "RFM12",13,10]
SSPIF = 0
GOSUB RM12INIT
BCNT=1
INTCON=$90
FLG=0
grp=net

mainloop:
IF RXDONE THEN
CMD=$820D ;receive $820D IDLE
GOSUB SNDCMD
INTCON=0
crc=-1

FOR I= 0 TO LEN+3

CRC_IN = RXBUFF[i]
gosub crc16
next
if rxbuff[len+4]=crc.lowbyte then ;only matching the crc lowbyte seems ok

I=RXBUFF[2]
if ( i.7 ) then gosub ack ; acknowlege reception if asked

; should check here for node id match


serout2 PORTA.0,84, [ HEX2 RXBUFF[1] ,",", HEX2 RXBUFF[2] ,",",HEX2 RXBUFF[3] ,"," ]
FOR I= 4 TO LEN+2
serout2 PORTA.0,84, [ RXBUFF[I] ,"," ]

NEXT
; serout2 PORTA.0,84, ["XXX", RXBUFF[len+3]," ", HEX2 RXBUFF[len+5], HEX2 RXBUFF[len+4]," ",hex4 crc, 13,10] ;len+4=lowbyte
serout2 PORTA.0,84, [RXBUFF[len+3], 13,10]
endif

FOR I= 1 TO MAXL
RXBUFF[I]=0 ;clear buffer
NEXT


CMD=0 ;reset fifo sequence
GOSUB SNDCMD ;
CMD=$CA80
GOSUB SNDCMD ;
CMD=$CA83 ;reset fifo
GOSUB SNDCMD
FLG=0
BCNT=1

INTCON=$90 ; enable rx int
CMD=$82DD ;receive on
GOSUB SNDCMD
ENDIF
I=0 ; something in main loop for the wdt

GoTo mainloop ' do it forever

End


SNDCMD: ;word size send ,note rfm12b dose not drop irq when ready for cmd
LOW SSC
SSPIF = 0
SSPBUF = CMD.HIGHBYTE
WHILE SSPIF =0 ' wait for SPI interupt flag
WEND ' wait for send
SSPIF = 0
SSPBUF = CMD.LOWBYTE
WHILE SSPIF =0 ' wait for SPI interupt flag
WEND ' wait for send


HIGH SSC
Return


RM12INIT: ;leaves radio in rxmode
CMD=0
GOSUB SNDCMD
CMD=$8205 ;SLEEP
GOSUB SNDCMD
PAUSE 1
CMD=$80D7
GOSUB SNDCMD
CMD=$A640
GOSUB SNDCMD
CMD=$C608
GOSUB SNDCMD
CMD=$94A2
GOSUB SNDCMD
CMD=$C2AC
GOSUB SNDCMD
CMD=$CA83
GOSUB SNDCMD
CMD=$CE63
GOSUB SNDCMD
CMD=$C483
GOSUB SNDCMD
CMD=$9850
GOSUB SNDCMD
CMD=$CC77
GOSUB SNDCMD
CMD=$E000
GOSUB SNDCMD
CMD=$C800
GOSUB SNDCMD
CMD=$C043
GOSUB SNDCMD
PAUSE 1
CMD=$82DD ;receive $82dd ' XMIT $823D
GOSUB SNDCMD
RETURN


RX:
LOW SSC
SSPIF = 0
SSPBUF = $B0 '
WHILE SSPIF=0 ' wait for SPI interupt flag
WEND
SSPIF = 0
SSPBUF = 0 ' write to SSPBUF
WHILE SSPIF =0 ' wait for SPI interupt flag
WEND
RXBUFF[BCNT] = SSPBUF ' store received character in array
BCNT=BCNT+1

IF (BCNT > MAXL) OR (BCNT > (LEN+5) )THEN RXDONE=1
HIGH SSC
INTCON=$90
@ INT_RETURN




crc16:

CRC = CRC ^ CRC_IN
for j=0to 7
if crc.0 then
crc= ((crc>>1) ^$a001 ) ;

else
crc= crc>>1
endif
next
return


xmit: ;tx a byte
WHILE RNINT =1 ' wait for irq interupt flag from rfm12b
WEND
cmd =cmd |$b800
GOSUB SNDCMD
return


ack: ;leaves radio idle
CMD=$823d ;tx on
GOSUB SNDCMD
pause 3
crc=-1
CMD=$aa ;preamble
GOSUB xmit
CMD=$aa ;preamble
GOSUB SNDCMD
CMD=$aa ;preamble
GOSUB xmit


CMD=$2d ;sync
GOSUB xmit
CMD=net ;network
CRC_IN=cmd
gosub crc16
GOSUB xmit
CMD=node ;node id
cmd.7=1
CRC_IN=cmd
gosub crc16
GOSUB xmit
CMD=rxbuff[1] ;ack from
CRC_IN=cmd
gosub crc16
GOSUB xmit
CMD=00 ;nill length
CRC_IN=cmd
gosub crc16
GOSUB xmit
CMD=crc.lowbyte
GOSUB xmit
CMD=crc.highbyte
GOSUB xmit
CMD=$aa ;postamble
GOSUB xmit
CMD=$aa ;postamble
GOSUB xmit
pause 4
CMD=$820d
GOSUB SNDCMD


return


sndbuff: ;leaves radio idle and rx int off , to use load dest ,data and len , len is the data payload size and call this sub
INTCON=0 ; watch this
grp=net
source=node
CMD=$823d ;tx on
GOSUB SNDCMD
pause 3
crc=-1
CMD=$aa ;preamble
GOSUB xmit
CMD=$aa ;preamble
GOSUB SNDCMD
CMD=$aa ;preamble
GOSUB xmit


CMD=$2d ;sync
GOSUB xmit


for i=0 to len + 3
CMD= rxbuff[i]
CRC_IN=cmd
gosub crc16
GOSUB xmit
next

CMD=crc.lowbyte
GOSUB xmit
CMD=crc.highbyte
GOSUB xmit
CMD=$aa ;postamble
GOSUB xmit
CMD=$aa ;postamble
GOSUB xmit
pause 4
CMD=$820d
GOSUB SNDCMD
return

[camerart]

Hi Richard,
Next I've got to squeeze your code into my Oshonsoft simulator, should be fun:)
I have to choose a future proof PIC. Apart from having an spi bus, are there any other considerations to note? e,g, speed, memory etc.
I already have modules with RFN22 on them, but I have some RFM69 and some RFM96 on order.
Thanks very much, C.
EDIT Hi again. I notice "Copyright (c) 2013 All Rights Reserved Can I have permission to post it on an Oshonsoft assistance forum, please?

[richard]

EDIT Hi again. I notice "Copyright (c) 2013 All Rights Reserved Can I have permission to post it on an Oshonsoft assistance forum, please?

No problem , but I don't particularly want to support it [ there is a slight bug in the reset fifo sequence too ,should be $ca81 from memory I think]
you realise of course that rfm69's are quite a different animal

[camerart]

No problem , but I don't particularly want to support it [ there is a slight bug in the reset fifo sequence too ,should be $ca81 from memory I think]
you realise of course that rfm69's are quite a different animal

Hi Richard,
I have been using: http://www.hobbyking.com/hobbyking/store/__27096__OrangeRx_Open_LRS_433MHz_9Ch_Receiver.htm l for a couple of years. They are programmed using a Chrome APP and have RFM22 chips on them, so I can play with them, while I learn how to program later modules RFM69 and 96 for example.

I hoped they would be similar, so once learnt, a different module could be programmed with few adjustments to the program.

I now have 4 BASIC programs, gleaned from the net, that I can follow, and as you say it does look daunting. I have to convert one or more into Oshonsoft basic, for my system and skills.
I've just got this one into Oshonsoft (compiles), but there are errors. So I commented out those bits with >>>>>>>>>>>>>>>>>>>> for correction later. I've enclosed it in case you see obvious mistakes (Clutching at straws!!)

I realise your time is valuable.
Regards, Eric.

[richard]

I found this useful , saves a lot of typing


ps use word or wordpad to view

[camerart]

I found this useful , saves a lot of typing


ps use word or wordpad to view

Hi Richard,
Thanks most useful.
C.

[camerart]

rfm69 and rfm12 modules don't work that way , they retain no settings when powered off so they to be fully configured every power up .


Hi R,
I've now got a circuit, with in circuit programming, and have changed frequency using SPI:smile:

I'm using RFM69 boards with 18F2431 PICs and was told they have SX1276 chips on them, by the supplier.

You say that they need ALL of the registers loading at power on. Could you clarify please, why does it state default values in the data sheet, or can the SX1276 retain the default settings?

C.

[richard]

You say that they need ALL of the registers loading at power on. Could you clarify please, why does it state default values in the data sheet, or can the SX1276 retain the default settings?


exactly , all registers return to their default por values when the chip is reset , the chip has no non volatile registers.
every register that you assign a non por value to needs that value reloaded at every reset, in my case that's nearly all of them

[camerart]

exactly , all registers return to their default por values when the chip is reset , the chip has no non volatile registers.
every register that you assign a non por value to needs that value reloaded at every reset, in my case that's nearly all of them

Hi R,
That will save me some time at least initially. As mentioned before I am starting with OOK. You dd ask me why I would, but I'm trying OOK first then FSK, then LoRa, as I gain experience.

As I can accept most of the default registers, all I need to do is load the ones that are different.

So far I can see the radio transmitting, but there is no modulation yet, so just a stream, with no breaks.

C.

[Denner]

Hello,

Someone has code-tested the RFM69 module.

THX.

[astanapane]

Im trying to figure out for most of the threads why RFM69s and LORA RFM 9x are so difficult to handle.

Technology goes to plug and play modules, and those shouldnt be an exception. You should use them in order to help you, and not make you feel like you need to know rocket science to program those little modules.

Richard gave me some directions, in an other similar thread, but i cannot accept that we need to right 2 pages asm code or an other higher level language in order to send a HELLO from one end to the other.

At the end of the day, i understand that those modules will not sell, or someone that would like to share the fixed library for PIC BASIC Pro, and just let all the other to use the modules in the most easy way, like all the arduino users do.

Anyway, i'm not a professional, just doing this as a hobby.

I cannot understand why the people that really know how to program and handle typical application, are not sharing their knowledge. In nowadays all things are plug and play. That should be the way we all think and help.

I'm a Chief Design engineer well known worldwide, in 3D printing Congenital Heart Defects for surgical planning, and i have shared for free my knowledge to 150 universities and hospitals in EMEA region. I dont want to make money of it. I want to be known and my name to be remembered in the future.

I know in the other hand that there are people come in here, ask for a code, and then they presented like it is theirs and they also make money out of it. So what? Those people will never do something good in their lives. I do share my knowledge and i have in mind that 10 out of the 100 people in the meeting will take my work and cope paste it as theirs. I really do not care.

Anyway, i know and respect everyone work, and maybe some of you really make money and live using this knowledge.

Thanks for listening and understanding.

Leonardo Bilalis.

https://www.linkedin.com/feed/?trk=

[richard]

i can only advise on rfm69 modules here
the modules come fixed to operate in one only of these bands you need one thats legal in your country
315MHz Module
433MHz Module
868MHz Module
915MHz Module

they can do FSK, GFSK, MSK, GMSK and OOK modulation
they are capable of FSK Bit rates up to 300 kb/s subject to
the bandwith / deviation selected the power level used

if you choose to have a packet radio system then the built in
Packet engine can perform CRC-16, AES-128 encyption and data whitening for you
if you network them they can also do Incoming Sync Word Recognition
and make good use of the 66-byte FIFO

they are capable of backwards compatability with older modules like rfm12b


for my network system i created a rfm12b compatable mode with a 5 byte preamble 3 byte syncword that incorporates a 1 byte net id and a 7 bit node id with a 1 bit auto acknowledge req flag , the network can transport node to node packets along with broadcast packets
it operates @434mHZ 50k deviation @17000 bps , with no encryption and a pic generated ccitt_16 crc ,it supports variable length
packets of 1-255 bytes [from memory]

reception can be polled or interrupt driven

there is no simple . I think I have three pages of possible register settings . have you looked at the data sheet or the sample code from the hoperf site ?
I got my initial rf12b system running by studying some of the Arduino libraries and adapting it to my needs



and not make you feel like you need to know rocket science to program those little modules.


it may not be rocket science but !

what did you have in mind ?

[Ioannis]

There are other modules capable of plug and play as you request. But they are not as cheap as the HopeRF are. HopeRF does really cheap modules, taking away from you all the burden of the RF circuit. Then it leaves the rest of the settings up to you, making the modules versatile as Richard described.

Also, every time the module is power cycled, it needs to be setup again, as it has no EEPROM to store the settings permanently.

If you want to have all the settings ready and just to connect it to power and a data port, then it is not for you.

These are great and cheap module but you have to do your part of the job. Can't have it all I 'm afraid.

Ioannis

[astanapane]

i understand. It is not as easy as it looks like. Absolutely it is not for me. I might have to look other solutions to transfer the GPS data from one side to an other.

I thought that it wouldnt be difficult for someone, in order to help this community, to create a library and a sample program. As i said before, i understand that it takes time, and it is not worth it to make it for free.

[camerart]

Hi,
I don't have time at the moment to work on these type of modules, so I am using HC-12s which work fine, but perhaps not the distance.

When I get time, I hope to get SX1278 modules working, they seem pretty good, but as said previously need a fair bit of managing.

C.

[astanapane]

Hi camerart,

thanks for your help. But i dont think i can do anything with those modules, as i understand are not for me and my knowledge are limited.

thanks anyway.

[richard]

after a bit of experimenting I have come up with a fairly simple demo for rfm69hw with no bells and whistles for pbp
it can support two nodes has a fixed length payload of 16 bytes the remote end is described but not provided in pbp code.

[camerart]

after a bit of experimenting I have come up with a fairly simple demo for rfm69hw with no bells and whistles for pbp
it can support two nodes has a fixed length payload of 16 bytes the remote end is described but not provided in pbp code.

Hi R,
That looks interesting thanks.

I am only able to read BASIC, but I may be able to slowly decode your program, when I come to use the RFM69 (POSS SX1276?)

C

[astanapane]

I will give the module a try. I need first, to understand how to use the SPI interface.

I'm reading now the 4 pin interface and 3 pin interface.

1. 4pin interface requires all MOSI, MISO, SCK, CE
2. 3pin interface requires only SCK, CE and a data pin.

In our case that we would like to send from one side (GPS board) the data to the receiver board, what is the best way to setup the connection?

i have seen the code Richard shared, (it is welcome all the time and really appreciate it), but i need for my self to go step by step.

anyone's advice will be much appreciated.

Thanks :)

[richard]

. I need first, to understand how to use the SPI interface

not really you need to understand what the rmf69 module wants , not what the pic mssp module is capable of .

refer to the rfm69hw data sheet , they do provide a pic connection example .

I have chosen the least complicated scheme possible

don't forget its a 3.3 v device , logic level converters are needed for a 5v pic

[astanapane]

Hi Richard,

for the schematic i think i'm ok. I can handle it. I keep saying because i know my self, that first i need to understand the basics. Even if you think that is too basic to read about SPI connection, i need to understand it, and get those small important information for me that will help me later.

Now i read this (https://learn.sparkfun.com/tutorials/rfm69hcw-hookup-guide) because i find it interesting (not the arduino code) but the information they share are useful. Like the " NODES " , Addressing, Broadcast addressing etc.

I have a long way.

[astanapane]

i have a pair of the Adafruit RFM69HCW Transceiver Radio Breakout - 433 MHz, in which there is a voltage regulator and level shifter, so the voltage range is 3-5 volts.

[richard]

imho the example schematic from hoperf data sheet has miso/mosi names transposed on the module so be wary.

mosi is master out slave in and pic is the master

[astanapane]

yes i have noticed. I will use the trusted 18F26K22 you have suggested for my project last time. :D

Is there any quick way to check whether the RFM module is powered up? Like to send a signal from the Master (PIC18F26K22) and at G0 of the modules port to connect and LED indicator. How may i know that the module is powered up?

[astanapane]

I did the simplest configuration connection between the PIC and the RFM69HCW.

Both of the boards are exactly the same. One will be the TX and the other will be the RX.

Still in a very early stage, and keep reading the SPI protocol.

[richard]

Is there any quick way to check whether the RFM module is powered up?


read a register on the module . write a new value to that register read the register again and confirm the new value


looking at your picture there are two wires missing on each module , that's never going to work

[Ioannis]

SPI is not RS232. Sure Richard spot it. You need to revise your connections.

Also, your caps around the crystal, what values are?

Ioannis

[astanapane]

Hi Richard and Ioannis, sorry for the bad quality of the picture.

Connections i believe are ok. But two wires werent visible on the first pic.

Capacitors are 22p and crystal is at 16Mhz. This combination seems to work just fine on my previous circuits.

[richard]

Also, your caps around the crystal, what values are?

on that subject why even use a crystal



Connections i believe are ok. But two wires weren't visible on the first pic.

wrong , did you even look at the schematic I provided ?

there are 5 connections needed

[astanapane]

I'm confused about the SPI connection.

In the manual of the PIC18F26K22 this is how do they have it Master and Slave.

The MOSI from Master goes to MISO on slave and the MISO from master goes to MOSI on slave. Which it seems for me to be the right connection.

8761

But everywhere else on the NET i find it as following. MISO on Master goes to MISO on slave and MOSI on Master goes to MOSI on slave.
8762
https://www.google.gr/search?q=spi+connection&source=lnms&tbm=isch&sa=X&ved=0ahUKEwiGkMHb_5bdAhUytYsKHUDiC-QQ_AUICigB&biw=1422&bih=701

[astanapane]

Richard why do we need to 5th connection? i See there is a DIO pin.

EDIT POST: ok found that here:

https://learn.adafruit.com/adafruit-rfm69hcw-and-rfm96-rfm95-rfm98-lora-packet-padio-breakouts/pinouts

G0 - the radio's "GPIO 0" pin, also known as the IRQ pin, used for interrupt request notification from the radio to the microcontroller, 3.3V logic level

I still do not fully understand it but will be the reason.

[richard]

sdo is pic output and would be the mosi line [master out slave In] connect to the module input pin, should be marked mosi
sdi is pic input and is the miso line [master in slave out ] connect to the module ouput pin, should be marked miso

[astanapane]

Perfect thanks for the explanation. It is clear.

[astanapane]

I know that most of you, do not have in mind that many of us, need to read the basics. For example, for me i need to read the SPI protocol, and the corresponding Data sheet of the PIC, in order to have a little understanding.

So what i understand is, for enabling the SPI we have to setup the following:

SSPCON the "bit 5" and the "bit 0" while for the SSPSTAT the "bit 7" and the "bit 6". In the meantime the TRIS bits must be configured.

For testing the SPI, i will try to use the PIC18F26K22, and configure the SSPCON, and SSPSTAT in addition to TRIS bits as from the code below.

Haven't done anything yet with coding, i'm in a very early stage to configure the SPI register bits.

In addition, the comments comeing from the project i have started with GPS, so ignore all those and keep focusing on the SPI section.

thanks a lot.


'************************************************* *********************
'* Name : 18F26K22.BAS *
'* Author : [Leonardo Bilalis] *
'* Notice : Copyright (c) 2018 [Leonardo Bilalis] *
'* : All Rights Reserved *
'* Date : 30/Jun/2018 *
'* Version : 1.0 *
'* Notes : This is a GPS Tracker based on the following components *
'* : PIC18F26K22 or PIC18F46K22 @ 64Mhz *
'* : MKT 3333 or 3339 GPS MODULE *
'* : 4D Systems ULCD Goldelox or Picasso Graphic Processor *
'* : RFM69HCW the range will be approximatelly 1000 meters *
'************************************************* *********************
' --------------------[ GPS Variables for NMEA sentenses ]---------------------/
' /
' $GPRMC,090045.000,A,3823.6645,N,02353.3600,E,0.02, 195.80,170518,,,A*62 /
' $GNGGA,140405.000,3823.6010,N,02353.3054,E,1,9,0.8 8,0.8,M,35.9,M,,*40 /
' $GPGSA,A,3,18,08,10,11,14,27,22,32,01,,,,2.62,1.11 ,2.37*03 /
' $GPVTG,215.60,T,,M,0.44,N,0.82,K,A*37 /
' /
'-----------------------------------------------------------------------/

' When the GPS Module is POWERED ON, then the following sentenses are received.

' $PMTK011,MTKGPS*08
' $PMTK010,001*2E
' $PMTK010,002*2D


'************************************************* ********************************
@ ERRORLEVEL -306 ; this command prevents the compiler to give you a notice of *
; crossing page boundary - make sure bits are set *
'************************************************* ********************************
#IF __PROCESSOR__ = "18F26K22"
#CONFIG ; The PBP configuration for the PIC18F26K22 is:
; CONFIG FOSC = RCIO6 ; External RC oscillator
CONFIG FOSC = HSHP ; HS oscillator (high power > 16 MHz)


;*---------------------------------4x PLL ENABLE--------------------------------------*|
;* 4X PLL Enable *|
;* CONFIG PLLCFG = OFF ;Oscillator used directly *|
CONFIG PLLCFG = ON ;Oscillator multiplied by 4 *|
;*------------------------------------------------------------------------------------*|
;
; Primary clock enable bit
; CONFIG PRICLKEN = OFF ;Primary clock can be disabled by software
CONFIG PRICLKEN = ON ;Primary clock enabled
;
; Fail-Safe Clock Monitor Enable bit
CONFIG FCMEN = OFF ;Fail-Safe Clock Monitor disabled
; CONFIG FCMEN = ON ;Fail-Safe Clock Monitor enabled
;
; Internal/External Oscillator Switchover bit
CONFIG IESO = OFF ;Oscillator Switchover mode disabled
; CONFIG IESO = ON ;Oscillator Switchover mode enabled

CONFIG BOREN = SBORDIS ; Brown-out Reset enabled in hardware only (SBOREN is disabled)

;*--------------------------------------------------------------------------------------------------------;|
CONFIG WDTEN = ON ; WDT is always enabled. SWDTEN bit has no effect ;|
CONFIG WDTPS = 32768 ; 1:32768 ---> HERE enable the watchdog timer with a 1:32768 postscale;|
;*--------------------------------------------------------------------------------------------------------;|

CONFIG PWRTEN = ON
CONFIG HFOFST = ON ; HFINTOSC output and ready status are not delayed by the oscillator stable status
CONFIG MCLRE = EXTMCLR ; MCLR pin enabled, RE3 input pin disabled
CONFIG LVP = OFF ; Single-Supply ICSP disabled
CONFIG XINST = OFF ; Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
CONFIG DEBUG = OFF ; Disabled

;*----------------------------------------------------------------------------------|
;*---------------Available configuration settings for PIC18F26K22-------------------|
;*----------------------------------------------------------------------------------|
;
; Oscillator Selection bits
; CONFIG FOSC = RC ;111X External RC oscillator, CLKOUT function on RA6
; CONFIG FOSC = ECLPIO6 ;EC oscillator (low power, <500 kHz)
; CONFIG FOSC = ECLP ;EC oscillator, CLKOUT function on OSC2 (low power, <500 kHz)
; CONFIG FOSC = ECMPIO6 ;EC oscillator (medium power, 500 kHz-16 MHz)
; CONFIG FOSC = ECMP ;EC oscillator, CLKOUT function on OSC2 (medium power, 500 kHz-16 MHz)
; CONFIG FOSC = INTIO7 ;Internal oscillator block, CLKOUT function on OSC2
; CONFIG FOSC = INTIO67 ;Internal oscillator block
; CONFIG FOSC = RCIO6 ;External RC oscillator
; CONFIG FOSC = RC ;External RC oscillator, CLKOUT function on OSC2
; CONFIG FOSC = ECHPIO6 ;EC oscillator (high power, >16 MHz)
; CONFIG FOSC = ECHP ;EC oscillator, CLKOUT function on OSC2 (high power, >16 MHz)
; CONFIG FOSC = HSMP ;HS oscillator (medium power 4-16 MHz)
; CONFIG FOSC = HSHP ;HS oscillator (high power > 16 MHz)
; CONFIG FOSC = XT ;XT oscillator
; CONFIG FOSC = LP ;LP oscillator

;*--------------------------------------------------------------------------------------------------------|
;* | -------------------------- | |
;* ----------------------------- | [PROTECTED OPTION FUSES] | ------------------------------------ |
;* | -------------------------- | |
;*--------------------------------------------------------------------------------------------------------|

CONFIG CP0 = OFF ; Block 0 (000800-003FFFh) not code-protected
CONFIG CP1 = OFF ; Block 1 (004000-007FFFh) not code-protected
CONFIG CP2 = OFF ; Block 2 (008000-00BFFFh) not code-protected
CONFIG CP3 = OFF ; Block 3 (00C000-00FFFFh) not code-protected
CONFIG CPB = OFF ; Boot block (000000-0007FFh) not code-protected
CONFIG CPD = OFF ; Data EEPROM not code-protected
CONFIG WRT0 = OFF ; Block 0 (000800-003FFFh) not write-protected
CONFIG WRT1 = OFF ; Block 1 (004000-007FFFh) not write-protected
CONFIG WRT2 = OFF ; Block 2 (008000-00BFFFh) not write-protected
CONFIG WRT3 = OFF ; Block 3 (00C000-00FFFFh) not write-protected
CONFIG WRTC = OFF ; Configuration registers (300000-3000FFh) not write-protected
CONFIG WRTB = OFF ; Boot Block (000000-0007FFh) not write-protected
CONFIG WRTD = OFF ; Data EEPROM not write-protected
CONFIG EBTR0 = OFF ; Block 0 (000800-003FFFh) not protected from table reads executed in other blocks
CONFIG EBTR1 = OFF ; Block 1 (004000-007FFFh) not protected from table reads executed in other blocks
CONFIG EBTR2 = OFF ; Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks
CONFIG EBTR3 = OFF ; Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks
CONFIG EBTRB = OFF ; Boot Block (000000-0007FFh) not protected from table reads executed in other blocks

#ENDCONFIG

#ELSE
#MSG "Wrong Processor selected!"
#ENDIF
;*---------------------------------------------------------------------------------------------------------|
;*---------------------------------------------------------------------------------------------------------|

define OSC 64

INCLUDE "modedefs.bas"
INCLUDE "ALLDIGITAL.pbp"
'INCLUDE "DT_INTS-18.bas" ; Base Interrupt System
'INCLUDE "ReEnterPBP-18.bas" ; Include if using PBP interrupts

OSCCON = %01110000 ; 64Mhz
OSCTUNE.6 = 1 ; Enable 4x PLL

while ! osccon2.7 :WEND ; to make sure the pll has stabilised before you run any other code


'------------------------------------------------------------------------------|
' INITIALIZE RAM |
'------------------------------------------------------------------------------|
initialize:
CLEAR

'-------------------------------------------------------------------------------------------------------------------------------------------------------------

'************************************************* ************************************************** ********
' --- NOTE --- *
'************************************************* ************************************************** ********
' --------------- The following configuration will be set only for testing the RFM69HCW --------------------
'************************************************* ************************************************** ********
' *
' when "0" then TRIS bit is set to output, while "1" TRIS bit is set to input *
' *
'************************************************* ************************************************** ********
TRISA = %00000000 'use TRISA to specify which pin is (1 = input) and which (0 = output) (ALL pins are output or SPI configuration related)
TRISB = %00000000 'use TRISB to specify which pin is (1 = input) and which (0 = output) (RB7 PORTB.7 is the RX input pin of the EUART, the rest are output or SPI configuration related)
TRISC = %00010000 'use TRISC to specify which pin is (1 = input) and which (0 = output) (RC7 PORTC.7 is the RX input pin of the EUART, the rest are output or SPI configuration related)
'in PORTC the RC3 attached is an LED.
' The above comments may be different as the project includes more peripherals and we have configured the bits for each specific application.


'------------------------------------------------------------------------|
'--------------------------- TRIS A B C ---------------------------------|
'------------------------------------------------------------------------| RX2 TX2 SDO2 SDI2 SCK2 SS2 RX1 TX1 SDO1 SDI1
' OSC1 OSC2 SS1 | | | | | | | | | | |
' | | | | RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0 VDD VSS RC7 RC6 RC5 RC4
' PORTA.7 PORTA.6 PORTA.5 PORTA.4 PORTA.3 PORTA.2 PORTA.1 PORTA.0 | |28| |27| |26| |25| |24| |23| |22| |21| |20| |19| |18| |17| |16| |15|
' bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 | ---------------------------------------------------------------------
' 0 0 0 0 0 0 0 0 | | |
'------------------------------------------------------------------------| | |
'------------------------------------------------------------------------| | |
' RX2 TX2 SDO2 SDI2 SCK2 SS2 | | |
' | | | | | | | | =============================== |
' PORTB.7 PORTB.6 PORTB.5 PORTB.4 PORTB.3 PORTB.2 PORTB.1 PORTB.0 | | | | |
' bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 | | | PIC18F26K22 | |
' 0 0 0 0 0 0 0 0 | | | | |
'------------------------------------------------------------------------| | | | |
'------------------------------------------------------------------------| | =============================== |
' RX1 TX1 SDO1 SDI1 SCK1 | | |
' | | | | | | | |
' PORTC.7 PORTC.6 PORTC.5 PORTC.4 PORTC.3 PORTC.2 PORTC.1 PORTC.0 | | _ |
' bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 | | |_| |
' 0 0 0 1 0 0 0 0 | | |
'------------------------------------------------------------------------| ---------------------------------------------------------------------
' |*1| |*2| |*3| |*4| |*5| |*6| |*7| |*8| |*9| |10| |11| |12| |13| |14|
'------------------------------------------------------------------------| RE3 RA0 RA1 RA2 RA3 RA4 RA5 VSS RA7 RA6 RC0 RC1 RC2 RC3
'----------------------- At start all PORTS LOW -------------------------| | | | | |
' | MCLR SS1 OSC1 OSC2 SCK1
'------------------------------------------------------------------------|
PORTA = 0 'make low all ports at A range |
PORTB = 0 'make low all ports at B range |
PORTC = 0 'make low all ports at C range |
PORTE = 0 'make low all ports at E range |
'------------------------------------------------------------------------|

'------------------------------------------------------------------------|
'-------------------------- COMPARATORS OFF -----------------------------|
'------------------------------------------------------------------------|
CM1CON0.7 = 0 'Disable comparator1 |
CM2CON0.7 = 0 'Disable comparator2 |
'------------------------------------------------------------------------|

'************************************************* ***********************
' *
' SPI CONFIGURATION REGISTERS *
' *
'************************************************* ***********************

SSPCON1 = %00100010 ' in here we se the 5th bit of the SSPCON1 register and the last 4 bits for the clock speed at 64Mhz.

'bit 5 SSPxEN: Synchronous Serial Port Enable bit

'In both modes, when enabled, these pins must be properly configured as input or output
'In SPI mode:
'1 = Enables serial port and configures SCKx, SDOx, SDIx and SSx as the source of the serial port pins(2)
'0 = Disables serial port and configures these pins as I/O port pins


'SSPxM<3:0>: Synchronous Serial Port Mode Select bits

'0000 = SPI Master mode, clock = FOSC/4
'0001 = SPI Master mode, clock = FOSC/16

'************************************************* ***************
'-----------------WE use the following setup--------------------*
'************************************************* ***************
' *
' 0010 = SPI Master mode, clock = FOSC/64 *
' *
'************************************************* ***************

'0011 = SPI Master mode, clock = TMR2 output/2
'0100 = SPI Slave mode, clock = SCKx pin, SSx pin control enabled
'0101 = SPI Slave mode, clock = SCKx pin, SSx pin control disabled, SSx can be used as I/O pin
'1010 = SPI Master mode, clock = FOSC/(4 * (SSPxADD+1))

SSP1STAT = %10000000 ' in here i need a help to understand what bits must be configured

'bit 7 SMP: SPI Data Input Sample bit

'SPI Master mode:
'1 = Input data sampled at end of data output time
'0 = Input data sampled at middle of data output time

'SPI Slave mode:
'SMP must be cleared when SPI is used in Slave mode


'bit 6 CKE: SPI Clock Edge Select bit (SPI mode only)

'In SPI Master or Slave mode:
'1 = Transmit occurs on transition from active to Idle clock state
'0 = Transmit occurs on transition from Idle to active clock state

'*-----------------------------------------------------------------------|
'*-----------------------------------------------------------------------|

CS1 VAR PORTA.5 ' chip select (SS) from PIC18F26K22 to RFM69HCW
SCK1 VAR PORTC.3 ' clock from PIC18F26K22 to RFM69HCW
SDI1 VAR PORTC.4 ' data IN , MISO from PIC18F26K22 to RFM69HCW
SDO1 VAR PORTC.5 ' data OUT, MOSI from PIC18F26K22 to RFM69HCW

[richard]

a few comments

for correct spi tx to rfm69 CKE must be asserted. SMP setting is irrelevant for rfm69 rx , I set SMP to suit other devices on my spi bus



'-----------------------------------------------------------------------|
PORTA = 0 'make low all ports at A range |
PORTB = 0 'make low all ports at B range |
PORTC = 0 'make low all ports at C range |
PORTE = 0 'make low all ports at E range |
'------------------------------------------------------------------------|
is a particularly dangerous idea when dealing with devices that have a chip select low input




'************************************************* ************************************************** ********
TRISA = %00000000 'use TRISA to specify which pin is (1 = input) and which (0 = output) (ALL pins are output or SPI configuration related)
TRISB = %00000000 'use TRISB to specify which pin is (1 = input) and which (0 = output) (RB7 PORTB.7 is the RX input pin of the EUART, the rest are output or SPI configuration related)
TRISC = %00010000 'use TRISC to specify which pin is (1 = input) and which (0 = output) (RC7 PORTC.7 is the RX input pin of the EUART, the rest are output or SPI configuration related)
'in PORTC the RC3 attached is an LED.
' The above comments may be different as the project includes more peripherals and we have configured the bits for each specific application.

is also dangerous when breadboarding an experimental platform , for instance if you were now to connect the rfm69 dio pin now you could easily apply 5v to a 3.3 v output pin and damage the rfm module even connecting it to a "low" output is not acceptable . I would expect the dio pin to connect directly to the module and not go through a logic level converter.
when breadboarding I only set pins as o/p when needed

useless comments are useless ,why make me read them ?
MY TAKE



'************************************************* *********************
'* Name : 18F26K22.BAS *
'* Author : [Leonardo Bilalis] *
'* Notice : Copyright (c) 2018 [Leonardo Bilalis] *
'* : All Rights Reserved *
'* Date : 30/Jun/2018 *
'* Version : 1.0 *
'* Notes : This is a GPS Tracker based on the following components *
'* : PIC18F26K22 or PIC18F46K22 @ 64Mhz *
'* : MKT 3333 or 3339 GPS MODULE *
'* : 4D Systems ULCD Goldelox or Picasso Graphic Processor *
'* : RFM69HCW the range will be approximatelly 1000 meters *
'************************************************* *********************

#CONFIG ;
CONFIG FOSC = HSHP ; HS oscillator (high power &gt; 16 MHz)
CONFIG PLLCFG = ON ;Oscillator multiplied by 4
CONFIG PRICLKEN = ON ;Primary clock enabled
CONFIG FCMEN = OFF ;Fail-Safe Clock Monitor disabled
CONFIG IESO = OFF ;Oscillator Switchover mode disabled
CONFIG BOREN = SBORDIS ; Brown-out Reset enabled in hardware only (SBOREN is disabled)
CONFIG WDTEN = ON ; WDT is always enabled. SWDTEN bit has no effect ;|
CONFIG WDTPS = 32768 ; 1:32768 ---> HERE enable the watchdog timer with a 1:32768 postscale;|
CONFIG PWRTEN = ON
CONFIG HFOFST = ON ; HFINTOSC output and ready status are not delayed by the oscillator stable status
CONFIG MCLRE = EXTMCLR ; MCLR pin enabled, RE3 input pin disabled
CONFIG LVP = OFF ; Single-Supply ICSP disabled
CONFIG XINST = OFF ; Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
CONFIG DEBUG = OFF ; Disabled
CONFIG CP0 = OFF ; Block 0 (000800-003FFFh) not code-protected
CONFIG CP1 = OFF ; Block 1 (004000-007FFFh) not code-protected
CONFIG CP2 = OFF ; Block 2 (008000-00BFFFh) not code-protected
CONFIG CP3 = OFF ; Block 3 (00C000-00FFFFh) not code-protected
CONFIG CPB = OFF ; Boot block (000000-0007FFh) not code-protected
CONFIG CPD = OFF ; Data EEPROM not code-protected
CONFIG WRT0 = OFF ; Block 0 (000800-003FFFh) not write-protected
CONFIG WRT1 = OFF ; Block 1 (004000-007FFFh) not write-protected
CONFIG WRT2 = OFF ; Block 2 (008000-00BFFFh) not write-protected
CONFIG WRT3 = OFF ; Block 3 (00C000-00FFFFh) not write-protected
CONFIG WRTC = OFF ; Configuration registers (300000-3000FFh) not write-protected
CONFIG WRTB = OFF ; Boot Block (000000-0007FFh) not write-protected
CONFIG WRTD = OFF ; Data EEPROM not write-protected
CONFIG EBTR0 = OFF ; Block 0 (000800-003FFFh) not protected from table reads executed in other blocks
CONFIG EBTR1 = OFF ; Block 1 (004000-007FFFh) not protected from table reads executed in other blocks
CONFIG EBTR2 = OFF ; Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks
CONFIG EBTR3 = OFF ; Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks
CONFIG EBTRB = OFF ; Boot Block (000000-0007FFh) not protected from table reads executed in other blocks
#ENDCONFIG

define OSC 64

OSCCON = %01110000 ; 64Mhz
OSCTUNE.6 = 1 ; Enable 4x PLL
while ! osccon2.7 :WEND ; to make sure the pll has stabilised before you run any other code


initialize:
CLEAR

TRISA = %11011111
TRISC = %11010111



SSPCON1 = %00100010 ' in here we se the 5th bit of the SSPCON1 register and the last 4 bits for the clock speed at 64Mhz.
SSP1STAT = %11000000 ' in here i need a help to understand what bits must be configured



CS1 VAR LATA.5 ' chip select (SS) from PIC18F26K22 to RFM69HCW
SCK1 VAR PORTC.3 ' clock from PIC18F26K22 to RFM69HCW
SDI1 VAR PORTC.4 ' data IN , MISO from PIC18F26K22 to RFM69HCW
SDO1 VAR PORTC.5 ' data OUT, MOSI from PIC18F26K22 to RFM69HCW

CS1 = 1

[astanapane]

Hi Richard, thanks for replying again. I understand you have more important things to do than to explain to me the basics.

Regarding the comments on the program, i leave them there for me. Sorry for disturbing your reading by using those comments. Because of i use them for my children project GPS, i try to keep those to remind me what i have done.

Now i have some questions, based on your code.



"for correct spi tx to rfm69 CKE must be asserted"

Ok that i will set, but still i do not understand "SPI Clock Edge Select bit" does inside the code?

Does it gives the "OK" when it is "1" Transmit occurs on transition from active to Idle clock state

which means that the data transmitted on the falling edge of SCK?


is a particularly dangerous idea when dealing with devices that have a chip select low input

Ok i will fix this. Do you mention this state, because it is accidentally dangerous to apply 5V on the circuit?

I have a step up/ step down regulator 1.2A at 3.3 volts for both of the test boards. I hope this will eliminate the issue.



CS1 VAR LATA.5 ' chip select (SS) from PIC18F26K22 to RFM69HCW

The above, it is long discussion over the net. Many people like me cannot understand clearly the difference between the LAT and PORT.

As i have read from the internet, Writing to the port we need to use LATx register, which is works fine.

Reading the port we can do it using PORTx.

In our case, chip select (SS) from PIC18F26K22 to RFM69HCW, we write to the port so we use the LATx register to write.

Still it is not clear to me, i need to see it in practice in order to understand.

Thanks once again for your help.

I have included in the startup SPI configuration program the following.

Those are var coming from the SSPCON and SSPSTAT registers. I may need to use them later in the code.



SMP var SSP1STAT.7 ' Data input sample phase
CKE VAR SSP1STAT.6 ' Clock Edge Select bit
SSPEN VAR SSP1CON1.5 ' SSP Enable bit
CKP VAR SSP1CON1.4 ' Clock Polarity Select

[richard]

Ok that i will set, but still i do not understand "SPI Clock Edge Select bit" does inside the code?

Does it gives the "OK" when it is "1" Transmit occurs on transition from active to Idle clock state

which means that the data transmitted on the falling edge of SCK?
yes the tx data is valid on sck's falling edge


is a particularly dangerous idea when dealing with devices that have a chip select low input Ok i will fix this. Do you mention this state, because it is accidentally dangerous to apply 5V on the circuit?

no , its because a device with a cs low type input will assert its outputs when cs is low, they should not be asserted until every thing is in order, imagine if you had mutpile devices on the spi bus.



I have a step up/ step down regulator 1.2A at 3.3 volts for both of the test boards. I hope this will eliminate the issue.

it wont


Many people like me cannot understand clearly the difference between the LAT and PORT


its quite simple , at high clock speeds rmw issues abound if you don't use lat regs for bit outputs
http://www.microchip.com/webinars.microchip.com/WebinarDetails.aspx?dDocName=en556253

[richard]

Regarding the comments on the program, i leave them there for me. Sorry for disturbing your reading by using those comments. Because of i use them for my children project GPS, i try to keep those to remind me what i have done.

there is a big difference between comments that impart some information and visual white noise that masks the very few bits of data that are crucially different
and worthy of notation

[astanapane]

My knowledge and time not helping my self to quickly develop a simple LED to light from one end of RFM69hcw to the other.

But i will keep reading and studding all the information needed to achieve my goal.

[astanapane]

Now a small step, in the code is to add the DIO0 pin from RFM69HCW to PIC18F26K22.

As i read from the net, that pin is the:

Received data ready interrupt signal from RFM69HCW to microcontroller

TRIS register must also be configured as input at that pin i guess as the RFM69HCW is the one sending data to PIC.

That i believe will complete the connections between the PIC and the RFM.


'************************************************* *********************
'* Name : 18F26K22.BAS *
'* Author : [Leonardo Bilalis] *
'* Notice : Copyright (c) 2018 [Leonardo Bilalis] *
'* : All Rights Reserved *
'* Date : 30/Jun/2018 *
'* Version : 1.0 *
'* Notes : This is a GPS Tracker based on the following components *
'* : PIC18F26K22 or PIC18F46K22 @ 64Mhz *
'* : MKT 3333 or 3339 GPS MODULE *
'* : 4D Systems ULCD Goldelox or Picasso Graphic Processor *
'* : RFM69HCW the range will be approximatelly 1000 meters *
'************************************************* *********************

#CONFIG ;
CONFIG FOSC = HSHP ; HS oscillator (high power &gt; 16 MHz)
CONFIG PLLCFG = ON ;Oscillator multiplied by 4
CONFIG PRICLKEN = ON ;Primary clock enabled
CONFIG FCMEN = OFF ;Fail-Safe Clock Monitor disabled
CONFIG IESO = OFF ;Oscillator Switchover mode disabled
CONFIG BOREN = SBORDIS ; Brown-out Reset enabled in hardware only (SBOREN is disabled)
CONFIG WDTEN = ON ; WDT is always enabled. SWDTEN bit has no effect ;|
CONFIG WDTPS = 32768 ; 1:32768 ---> HERE enable the watchdog timer with a 1:32768 postscale;|
CONFIG PWRTEN = ON
CONFIG HFOFST = ON ; HFINTOSC output and ready status are not delayed by the oscillator stable status
CONFIG MCLRE = EXTMCLR ; MCLR pin enabled, RE3 input pin disabled
CONFIG LVP = OFF ; Single-Supply ICSP disabled
CONFIG XINST = OFF ; Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
CONFIG DEBUG = OFF ; Disabled
CONFIG CP0 = OFF ; Block 0 (000800-003FFFh) not code-protected
CONFIG CP1 = OFF ; Block 1 (004000-007FFFh) not code-protected
CONFIG CP2 = OFF ; Block 2 (008000-00BFFFh) not code-protected
CONFIG CP3 = OFF ; Block 3 (00C000-00FFFFh) not code-protected
CONFIG CPB = OFF ; Boot block (000000-0007FFh) not code-protected
CONFIG CPD = OFF ; Data EEPROM not code-protected
CONFIG WRT0 = OFF ; Block 0 (000800-003FFFh) not write-protected
CONFIG WRT1 = OFF ; Block 1 (004000-007FFFh) not write-protected
CONFIG WRT2 = OFF ; Block 2 (008000-00BFFFh) not write-protected
CONFIG WRT3 = OFF ; Block 3 (00C000-00FFFFh) not write-protected
CONFIG WRTC = OFF ; Configuration registers (300000-3000FFh) not write-protected
CONFIG WRTB = OFF ; Boot Block (000000-0007FFh) not write-protected
CONFIG WRTD = OFF ; Data EEPROM not write-protected
CONFIG EBTR0 = OFF ; Block 0 (000800-003FFFh) not protected from table reads executed in other blocks
CONFIG EBTR1 = OFF ; Block 1 (004000-007FFFh) not protected from table reads executed in other blocks
CONFIG EBTR2 = OFF ; Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks
CONFIG EBTR3 = OFF ; Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks
CONFIG EBTRB = OFF ; Boot Block (000000-0007FFh) not protected from table reads executed in other blocks
#ENDCONFIG

define OSC 64

OSCCON = %01110000 ; 64Mhz
OSCTUNE.6 = 1 ; Enable 4x PLL
while ! osccon2.7 :WEND ; to make sure the pll has stabilised before you run any other code


initialize:
CLEAR

TRISA = %11011111
TRISC = %11010111



SSPCON1 = %00100010 ' in here we se the 5th bit of the SSPCON1 register and the last 4 bits for the clock speed at 64Mhz.
SSP1STAT = %11000000 ' in here i need a help to understand what bits must be configured



CS1 VAR LATA.5 ' chip select (SS) from PIC18F26K22 to RFM69HCW
DIO0 VAR PORTC.2 ' Received data ready interrupt signal from RFM69HCW to microcontroller
SCK1 VAR PORTC.3 ' clock from PIC18F26K22 to RFM69HCW
SDI1 VAR PORTC.4 ' data IN , MISO from PIC18F26K22 to RFM69HCW
SDO1 VAR PORTC.5 ' data OUT, MOSI from PIC18F26K22 to RFM69HCW

SSPIF VAR PIR1.3 ' SPI interrupt flag
SMP VAR SSP1STAT.7 ' Data input sample phase
CKE VAR SSP1STAT.6 ' Clock Edge Select bit
SSPEN VAR SSP1CON1.5 ' SSP Enable bit
CKP VAR SSP1CON1.4 ' Clock Polarity Select

CS1 = 1

[richard]

As i read from the net, that pin is the:

Received data ready interrupt signal from RFM69HCW to microcontroller

not really, in rx mode its PayloadReady in tx mode its PacketSent




That i believe will complete the connections between the PIC and the RFM.

that's 1% of the job done


cannot see any point to creating these vars , they will never be used


SSPIF VAR PIR1.3 ' SPI interrupt flag
SMP VAR SSP1STAT.7 ' Data input sample phase
CKE VAR SSP1STAT.6 ' Clock Edge Select bit
SSPEN VAR SSP1CON1.5 ' SSP Enable bit
CKP VAR SSP1CON1.4 ' Clock Polarity Select

[astanapane]

that's 1% of the job done


That is what i meant :D