Bootloader pic16f1825 @32mhz pll

[richard]

MY bootloader config.ini is as follows but I cannot get it to work . in fact pll and bootloader seems to always give me grief
any ideas ?




; optional path information - default output folder is
; user documents -> umcbuild...
[PATH]
Output=C:\MYBOOTLOADER
[TEMPLATE]
;PIC18=..\src\18F\umc_loader.asm
PIC16=..\src\16F\umc_loader.asm
; device name and OSC...
[MCU]
Device=16F1825
OSC=32000000
;[USART]
BAUDRATE = 19200 ; initial startup baudrate (default is 19200)
BRGH16 = 1 ; 16 bit SPBRG support (default is OFF)
; device configuration settings...
[CONFIG] ;----- CONFIG1 Options --------------------------------------------------
__config _CONFIG1, _FOSC_INTOSC & _CP_OFF & _WDTE_ON & _PWRTE_ON & _MCLRE_ON & _CLKOUTEN_OFF
__config _CONFIG2, _PLLEN_ON & _LVP_OFF
; place startup code in here...
[USERCODE]
;banksel APFCON0
; you need this as APFCON0 is at banked address.
;bSf APFCON0,7 ;bSf APFCON0,2
banksel ANSELC ; you need this as ANSELA is at banked address.
clrf ANSELC
banksel OSCCON ; you need this as OSCCON is at banked address.
movlw 0xf0 ; 8 mhz, pll enabled
movwf OSCCON
banksel OSCSTAT
btfss OSCSTAT,6
goto $-1

[tumbleweed]

I don't have a chip to try it on, but off the top of my head that looks ok.

Are you sure it's not the _config _WDTEN_ON that's fouling things up?
Try _WDTEN_OFF or _WDTE_SWDTEN (if you want it programmable) and see what happens.

[richard]

didn't help

last effort

; optional path information - default output folder is
; user documents -> umcbuild...
[PATH]
Output=C:\MYBOOTLOADER
[TEMPLATE]
;PIC18=..\src\18F\umc_loader.asm
PIC16=..\src\16F\umc_loader.asm
; device name and OSC...
[MCU]
Device=16F1825
OSC=8000000
[USART]
BAUDRATE = 19200 ; initial startup baudrate (default is 19200)
BRGH16 = 1 ; 16 bit SPBRG support (default is OFF)
; device configuration settings...
[CONFIG] ;----- CONFIG1 Options --------------------------------------------------
__config _CONFIG1, _FOSC_INTOSC & _CP_OFF & _WDTE_OFF & _PWRTE_ON & _MCLRE_ON & _CLKOUTEN_OFF
__config _CONFIG2, _PLLEN_OFF & _LVP_OFF
; place startup code in here...
[USERCODE]
;banksel APFCON0
; you need this as APFCON0 is at banked address.
; bCf APFCON0,7
; bCf APFCON0,2
; banksel ANSELC ; you need this as ANSELA is at banked address.
movlb 3
BCF ANSELC,5
BCF ANSELC,4
movlb 1
BSF TRISC,4
BSF TRISC,5
;movlb 1
movlw 0x70 ; 8 MHz
movwf OSCCON
; btfss OSCSTAT,6
; goto $-1

[Dave]

The attached is what I use when using the ccp on portc. It places com on porta.

[richard]

tried that dave , still no go

query this though I say It places com on portc




what I use when using the ccp on portc. It places com on porta.

banksel APFCON0 ; you need this as APFCON0 is at banked address.
movlw b'00000000' ; ALL PORTS TO DEFAULT
;movlw b'10000100' ; COM PORT TO RA0:RA1
movwf APFCON0

not sure where i'm going wrong

[Dave]

You are right Richard, I had the wrong file on the wrong computer. Try this one. I really need to watch what I'm doing....

[richard]

Many thanks dave , that's got it going.

[richard]

bootloader confusion

take this pgm


'************************************************* ***************
'* Name :blinky.pbp *
'* Author : richard *
'* Notice : *
'* : *
'* Date : *
'* Version : 16f1825 @3.3 volts *
'* Notes : *
'* : *
'*
'************************************************* ***************

#CONFIG
__config _CONFIG1, _FOSC_INTOSC & _CP_OFF & _WDTE_OFF & _PWRTE_ON & _MCLRE_ON & _CLKOUTEN_OFF
__config _CONFIG2, _PLLEN_OFF & _LVP_OFF
#ENDCONFIG
DEFINE LOADER_USED 1
DEFINE OSC 32
DEFINE HSER_RCSTA 90h ' Enable serial port & continuous receive
DEFINE HSER_TXSTA 24h ' Enable transmit, BRGH = 1
DEFINE HSER_CLROERR 1 ' Clear overflow automatically
DEFINE HSER_SPBRG 207 ' 38400 Baud @ 32MHz,
SPBRGH = 0
BAUDCON.3 = 1 ' Enable 16 bit baudrate generator
led var latc.0
TRISA=%111111
TRISC=%111110
OSCCON=$F0
ANSELA=0
ANSELC=0

while !OSCSTAT.6
wend

hserout [ "Ready",9,"%",bin6 trisc,13,10]

mainloop:
led=!led
pause 1000
goto mainloop


when loaded with pk2

printout

Ready %111110

when loaded with bootloader

Ready %111110

ie all portc is input except bit 0, yet hserout works tx=portc.4



data sheet says


Setting the TXEN bit of the TXSTA register enables the
transmitter circuitry of the EUSART. Clearing the SYNC
bit of the TXSTA register configures the EUSART for
asynchronous operation. Setting the SPEN bit of the
RCSTA register enables the EUSART and automatically
configures the TX/CK I/O pin as an output. If the TX/CK
pin is shared with an analog peripheral, the analog I/O
function must be disabled by clearing the corresponding
ANSEL bit.


all is good


yet for the bootloader




; optional path information - default output folder is
; user documents -> umcbuild...
[PATH]
Output=C:\MYBOOTLOADER
[TEMPLATE]
;PIC18=..\src\18F\umc_loader.asm
PIC16=..\src\16F\umc_loader.asm
; device name and OSC...
[MCU]
Device=16F1825
OSC=32000000
[USART]
BAUDRATE = 19200 ; initial startup baudrate (default is 19200)
BRGH16 = 1 ; 16 bit SPBRG support (default is OFF)
; device configuration settings...
[CONFIG] ;----- CONFIG1 Options --------------------------------------------------
__config _CONFIG1, _FOSC_INTOSC & _CP_OFF & _WDTE_OFF & _PWRTE_ON & _MCLRE_ON & _CLKOUTEN_OFF
__config _CONFIG2, _PLLEN_ON & _LVP_OFF
; place startup code in here...
[USERCODE]
movlb 3
BCF ANSELC,5
BCF ANSELC,4
movlb 1
BCF TRISC,4 without this bootloader fails
BSF TRISC,5
movlw 0x70 ; 32 MHz
movwf OSCCON
btfss OSCSTAT,6
goto $-1

:confused: I just don't follow it

[Dave]

Richard, The HSEROUT command is probably setting the tris register for the operator to make things easy. I do not use any of the serial commands available with PBP. I only use the hardware serial ports and use interrupt driven serial input as well as output. Also during the Boot Loading process you have to set all port direction registers and APFCON registers as your PBP code is not executing yet. Also clearing bits 4:5 of ANSELC does no good as they are not inplemented. No analog operation of these pins.

[richard]

The HSEROUT command is probably setting the tris register for the operator to make things easy

No it seems not , I have done a bit more experimenting and the chip works as per the data sheet ie
Setting the SPEN bit of the
RCSTA register enables the EUSART and automatically
configures the TX/CK I/O pin as an output.
seting or clearing the tris bit has no effect on the eusart ,

this int driven background printing demo works just fine when trisc.4 is set or not



clearing bits 4:5 of ANSELC does no good as they are not implemented

correct , that saves a couple of words (don't know how I missed that ) and what you say about APFCON makes sense if it can affect the bootloader



'************************************************* ***************
'* Name : PRINT_16_TX_INT.pbp *
'* Author : richard *
'* Notice : *
'* : *
'* Date : *
'* Version : 16f1825 *
'* Notes : *
'* : *
'*
'************************************************* ***************

#CONFIG
__config _CONFIG1, _FOSC_INTOSC & _CP_OFF & _WDTE_OFF & _PWRTE_ON & _MCLRE_ON & _CLKOUTEN_OFF
__config _CONFIG2, _PLLEN_OFF & _LVP_OFF
#ENDCONFIG
DEFINE LOADER_USED 1
DEFINE OSC 32

include "dt_ints-14.bas"
include "REENTERPBP.bas"

asm
INT_LIST macro
INT_HANDLER TX_INT , _do_tx, PBP,no

endm
INT_CREATE
ENDASM


RCSTA = $90 ' Enable serial port & continuous receive
TXSTA = $20 ' Enable transmit, BRGH = 0
SPBRG = 51 ' 38400 Baud @ 32MHz, 0.16%
SPBRGH = 0
BAUDCON.3 = 1 ' Enable 16 bit baudrate generator

prnb var byte[32] bank0
spos var byte bank0
rpos var byte bank0
maxq con 31
HEAD VAR BYTE [70]
I VAR BYTE
J VAR BYTE
K VAR BYTE
PASS VAR WORD
led var latc.0
TRISA=%111111
TRISC=%111110
OSCCON=$f0
ANSELA=0
ANSELC=0

CLEAR
while !OSCSTAT.6
wend
LED=0
INTCON=$C0

ARRAYWRITE head, [ "Ready",9,"%",bin6 trisc,13,10,0]
GOSUB MYPRINT
ARRAYWRITE head, [ "still",9,"%",bin6 trisc,13,10,0]
GOSUB MYPRINT
mainloop:
pause 500
ARRAYWRITE head, [ "still Enable 16 bit baudrate generator ",0]
GOSUB MYPRINT
ARRAYWRITE head, [ "PASS Enable 16 bit baudrate generator",9,#PASS,13,10,0]
GOSUB MYPRINT
PASS=PASS+1
goto mainloop



MYPRINT:
J=0
WHILE HEAD[J]
INTCON=0
I=SPOS+1
K=RPOS
IF ((I)==K) || ((I== MAXQ )&& !K ) THEN
INTCON=$C0
PAUSE 20
led=!led
ELSE
PRNB[SPOS]= HEAD[J]
SPOS=SPOS+1
PIE1.4=1
IF SPOS=MAXQ THEN SPOS=0
J=J+1
ENDIF
INTCON=$C0
WEND
RETURN



:do_tx
IF RPOS == SPOS THEN
PIE1.4=0
ELSE
IF PRNB[RPOS] THEN
TXREG=PRNB[RPOS]
RPOS=RPOS+1
if rpos==maxQ then rpos=0
ENDIF
ENDIF
@ INT_RETURN

[Dave]

Good Job Richard....