USART2 setting for 1MHzCPU + 4PLL

[longpole001]

Hi guys

this is new one for me

i normally have run the cpus at 32Mhz or 64Mhz and the setting i have for the USART2 at those speeds has worked fine in the past and work on this device when i set it up for 32 or 64Mhz

but now i need to drop the power usage down as low as i can , which has ment droping the clock as low as i can for the application to work

as a result i have set the main cpu at 1mhz , and enabled the PPL to give me a 4Mhz cpu.

However my terminal now refuses to work ,at the lower speed , i do see some chrs on the terminal but they are rubbish so clearly the baud rate is a problem

when using the 32Mhz setting and tried other buad rate down to 9600 and works ok

but now trying the 4mhz i get nothing or sometime s just rubbish

any thoughts

Cheers

sheldon



DEFINE OSC 32 ' Timing referance for pause , pauseus commands
DEFINE ADC_BITS 12 ' Number of bits in ADCIN result - Required for adcin command
DEFINE PULSIN_MAX 2000 ' Maximum counts( clock ticks) allowed before pulsin times out( 2000 ^ 1.25us = 2.5 ms)
DEFINE HSER_PORT 2 ' Hser port 2 use
DEFINE HSER2_RCSTA 90h ' Hser2 receive status init
DEFINE HSER2_TXSTA 24h ' Hser2 transmit status init
DEFINE HSER2_BAUD 38400 ' Hser2 baud rate




when cpu at 4mhz have just droped the buad rate 4800



DEFINE OSC 4 ' Timing referance for pause , pauseus commands
DEFINE ADC_BITS 12 ' Number of bits in ADCIN result - Required for adcin command
DEFINE PULSIN_MAX 2000 ' Maximum counts( clock ticks) allowed before pulsin times out( 2000 ^ 1.25us = 2.5 ms)
DEFINE HSER_PORT 2 ' Hser port 2 use
DEFINE HSER2_RCSTA 90h ' Hser2 receive status init
DEFINE HSER2_TXSTA 20h ' Hser2 transmit status init
DEFINE HSER2_CLROERR 1 ' Clear overflow automatically
DEFINE HSER2_BAUD 4800 ' Hser2 baud rate



other osc settings for 4mhz





OSCCON = %00110000 ' Select 1Mhz - using 1Mhz internal with PPLx4 in Config1H<3:0> = IDLEN =0 , 8Mhz , OSTS=0,RFIOFS=1,RC_Run (1x) OSC using PLL
' Bit 7 IDLEN =0 ( sleep mode when sleep instraction executed)
' Bits 6-4 - 111 = 16Mhz , 110 = 8MHz ,101 = 4 MHz, 100 = 2MHz 011 = 1MHz
' If INTTSRC=0 and MFIOSEL= 0 then 010 = HF-INTOSC/32 (500Khz), 001 = HF-INTOSC/64 (250Khz) ,000 = LF-INTOSC (31.25Khz)
' If INTTSRC=0 and MFIOSEL= 1 then 010 = MF-INTOSC (500Khz), 001 = MF-INTOSC/2 (250Khz) ,000 = LF-INTOSC (31.25Khz)
' If INTTSRC=1 and MFIOSEL= 0 then 010 = HF-INTOSC/32 (500Khz), 001 = HF-INTOSC/64 (250Khz) ,000 = HF-INTOSC/512 (31.25Khz)
' If INTTSRC=1 and MFIOSEL= 1 then 010 = MF-INTOSC (500Khz), 001 = MF-INTOSC/2 (250Khz) ,000 = MF-INTOSC/16 (31.25Khz)
' Note: INTSRC = OSCTUNE<7> and MFIOSEL = OSCCON2<0>
' Bit 3 - OSTS = 0 - Osc startup time out is ruinning from internal OSC ( HF, MF or LF-INTOSC)
' Bit 2 - HFIOFS =1 ( INTOSC Frq stable bit - 1 = stable , 0 = not stable
' Bits 1-0 - 00= Dephalt Pri OSc ( OSC1/2 or HF-INTOSC with/without PLL set in FOSC,3:0> config1H <3.0>
' 01 = SOSC osc
' 1x = Internal osc ( LF, MF,HF-INTOSC)

' OSCCON2 = $00 ' Bit 7 n/a , Bit 6 - SOSCRUN - Run status bit , Bit 5-4 n/a,
' Bit 3 = SOASCGO - Osc Start control bit 1 = OSC running , 0 = OSC shut off if no requests for it
' Bit 2 n/a , Bit 1 - MFIOFS 1= MFINTOSC stable 0 = Not stable
' Bit 0 MFIOSEL - 1 = MF-INTOSC replaces HF-ISTOSC Freq for 500Khz,250Khz,31.25KHz) 0 = MF-INTOSC not used

OSCTUNE = %01000000 ' Bit 7 - INTSRC - internal LF Source Select 1 = 31.25 from 16Mhz Internal /512 HF-INTOSC ) 0 = Internal 31khz OSC
' Bit 6 - PLLEN - 1 PLL enabled , 0 = PLL disabled
' Bits 5-0 Frequancy callibaration 00000 = centre Frq

[longpole001]

well after fiddling and some reading of the datasheet - yes i am slake sometimes

the following setting were applied and work

one thing is clear is that the serial ports setting applied worked only when i used the setting based on the core base osc speed of 1mhz , not the 4mhz which is applied with the PPL

this seems to hold up true also settings with timer 0

it sort of make me think that the PPL is not looked at with core timing features of the chip , but i know this is not true when using it at 32 and 64,

anyone can explain this to me be great

cheers

Sheldon



DEFINE OSC 4 ' Timing referance for pause , pauseus commands
DEFINE ADC_BITS 12 ' Number of bits in ADCIN result - Required for adcin command
DEFINE PULSIN_MAX 2000 ' Maximum counts( clock ticks) allowed before pulsin times out( 2000 ^ 1.25us = 2.5 ms)
DEFINE HSER_PORT 2 ' Hser port 2 use
DEFINE HSER2_RCSTA 90h ' Hser2 receive status init
DEFINE HSER2_TXSTA 24h ' Hser2 transmit status init ( BIT2 -BRGH 1= HI SPEED, 0= LOW SPEED )
DEFINE HSER2_CLROERR 1 ' Clear overflow automatically
DEFINE HSER2_BAUD 19200 ' Hser2 baud rate
DEFINE HSER2_SPBRG 12 ' 19200 Baud @ SPBRGH = 12 0.16% error
BAUDCON2.3 = 1 ' set BRG16 = 1 - 16BIT/ASYNC

[Tabsoft]

I must have missed it.....

What PIC?

[longpole001]

using a 18f46k80 , but i would think any of simular series would have this as well

again it very rare for me to use a pic at such a low osc rate and this where i found the problem for the calculations

[Tabsoft]

Can you post your currently used config bits, OSCCON, OSCCON2 and OSCTUNE settings?

[richard]

from the data sheet osc section





Section 3.6.2 “INTPLL Modes”
. Care should be taken
that the PLL is enabled only if the HF-INTOSC
postscaler is configured for 4 MHz, 8 MHz or 16 MHz

[Tabsoft]

Just where I was headed Richard, hence my question.
The registers/config bits would show how he is setting up the clock.

[longpole001]

see orginal post at bottom of page

[Tabsoft]

Try again. :smile:

Config bits are not in the original post, that's why I asked.

Suggest you determine how you have the OSC mode configured, then look at the OSC block diagram and see what jumps out.
:wink:

[longpole001]

what i think it saying is that the PPl is not applied when using a 1MHz osc ??








' config for 18F46K80

#CONFIG

;----- CONFIG1L Options --------------------------------------------------
CONFIG XINST = OFF
CONFIG SOSCSEL = DIG ; Digital (SCLKI) mode; I/O port functionality of RC0 and RC1 is enabled
CONFIG INTOSCSEL = LOW ; LF-INTOSC in low-power mode during Sleep
CONFIG RETEN = ON ; Ultra Low power regulator is Enabled (Controlled by SRETEN bit)when in sleep

;----- CONFIG1H Options --------------------------------------------------
CONFIG IESO = OFF
CONFIG FCMEN = OFF
CONFIG PLLCFG = OFF
CONFIG FOSC = INTIO2 ; Internal RC oscillator , PORTA.6 , PORTA.7 as I/O

;----- CONFIG2L Options --------------------------------------------------
CONFIG BORPWR = ZPBORMV ; ZPBORMV instead of BORMV is selected
CONFIG BORV = 2 ; 2V
CONFIG BOREN = SBORDIS ; Enabled in hardware, SBOREN disabled
CONFIG PWRTEN = OFF

;----- CONFIG2H Options --------------------------------------------------
CONFIG WDTPS = 512 ; 1:512
CONFIG WDTEN = OFF ; WDT Off

;----- CONFIG3L Options --------------------------------------------------
; no register in the device

;----- CONFIG3H Options --------------------------------------------------
CONFIG MCLRE = ON ; MCLR ENabled FOR DIAG , RG5 DISabled
CONFIG MSSPMSK = MSK7 ; 7 Bit address masking mode
CONFIG CANMX = PORTB ; ECAN TX and RX pins are located on RB2 and RB3, respectively

;----- CONFIG4L Options --------------------------------------------------
CONFIG BBSIZ = BB1K ; 1K word Boot Block size
CONFIG STVREN = ON

;----- CONFIG5L Options --------------------------------------------------

CONFIG CP0 = ON ; MEMORY BLOCK 0 CODE PROTECT BIT - 7KW 800h - 3FFFh ( when 1K BOOT OPTION used )
CONFIG CP1 = ON ; MEMORY BLOCK 1 CODE PROTECT BIT - 8KW 4000h - 7FFFh
CONFIG CP2 = ON ; MEMORY BLOCK 2 CODE PROTECT BIT - 8KW 8000h - BFFFh
CONFIG CP3 = ON ; MEMORY BLOCK 3 CODE PROTECT BIT - 8KW C000h - FFFFh


;----- CONFIG5H Options --------------------------------------------------
CONFIG CPD = OFF ; EEPROM DATA PREOTECT BIT - EXTERNAL R/W
CONFIG CPB = ON ; BOOT BLOCK CODE PROTECT BIT

;----- CONFIG6L Options --------------------------------------------------
CONFIG WRT0 = OFF ; MEMORY BLOCK WRITE PROTECT BIT
CONFIG WRT1 = OFF
CONFIG WRT2 = OFF
CONFIG WRT3 = OFF


;----- CONFIG6H Options --------------------------------------------------
CONFIG WRTD = OFF ; EEPROM WRITE PROTECT BIT - INTERNAL AND EXTERNAL
CONFIG WRTB = ON ; BOOT BLOCK WRITE PROTECT
CONFIG WRTC = ON ; CONFIGURATION REGISTER WRITE PROTECT BIT

;----- CONFIG7L Options --------------------------------------------------
CONFIG EBTR0 = OFF ; MEMORY READ TABLE BLOCK PROTECT
CONFIG EBTR1 = OFF
CONFIG EBTR2 = OFF
CONFIG EBTR3 = OFF

;----- CONFIG7H Options --------------------------------------------------
CONFIG EBTRB = OFF ; TABLE READ PROTECT BOOT

#ENDCONFIG
clear ' clear all varables to 0 on startup
' ---------------- Setup All Define statements ------------
DEFINE OSC 4 ' Timing referance for pause , pauseus commands
DEFINE ADC_BITS 12 ' Number of bits in ADCIN result - Required for adcin command
DEFINE PULSIN_MAX 2000 ' Maximum counts( clock ticks) allowed before pulsin times out( 2000 ^ 1.25us = 2.5 ms)
DEFINE HSER_PORT 2 ' Hser port 2 use
DEFINE HSER2_RCSTA 90h ' Hser2 receive status init
DEFINE HSER2_TXSTA 24h ' Hser2 transmit status init ( BIT2 -BRGH 1= HI SPEED, 0= LOW SPEED )
DEFINE HSER2_CLROERR 1 ' Clear overflow automatically
DEFINE HSER2_BAUD 19200 ' Hser2 baud rate
DEFINE HSER2_SPBRG 12 ' 19200 Baud @ SPBRGH = 12 0.16% error
BAUDCON2.3 = 1 ' set BRG16 = 1 - 16BIT/ASYNC

' ---------- Set up DT_INTS-18 Routine for Instant Interupt handling -----------

INCLUDE "DT_INTS-18.bas" ; Base Interrupt System for 18FxxK80 processors
INCLUDE "ReEnterPBP-18.bas" ; Include if using PBP interrupts

ASM
INT_LIST macro ; IntSource , Label , Type, ResetFlag?

INT_Handler TMR0_INT, _Timer0_Count, PBP, yes ; call Timer0_Count subroutine
INT_Handler RBC_INT, _Rx_mode_IOC , PBP, yes ; Call Rx_mode_IOC subroutine for RF RX_mode
INT_Handler RX2_INT, _Term_RX , PBP, yes ; Call Term_input for terminal char buffer
INT_Handler INT0_INT, _Sleep_Over , PBP, Yes ; Call for INT0 trigger - when exit sleep mode
endm
INT_CREATE ; Creates the Interrupt Processor
ENDASM





'----------- 18F46K80 - PIC chip Dephalt settings --------------------





OSCCON = %00110000 ' Select 1Mhz - using 1Mhz internal with PPLx4 in Config1H<3:0> = IDLEN =0 , 8Mhz , OSTS=0,RFIOFS=1,RC_Run (1x) OSC using PLL
' Bit 7 IDLEN =0 ( sleep mode when sleep instraction executed)
' Bits 6-4 - 111 = 16Mhz , 110 = 8MHz ,101 = 4 MHz, 100 = 2MHz 011 = 1MHz
' If INTTSRC=0 and MFIOSEL= 0 then 010 = HF-INTOSC/32 (500Khz), 001 = HF-INTOSC/64 (250Khz) ,000 = LF-INTOSC (31.25Khz)
' If INTTSRC=0 and MFIOSEL= 1 then 010 = MF-INTOSC (500Khz), 001 = MF-INTOSC/2 (250Khz) ,000 = LF-INTOSC (31.25Khz)
' If INTTSRC=1 and MFIOSEL= 0 then 010 = HF-INTOSC/32 (500Khz), 001 = HF-INTOSC/64 (250Khz) ,000 = HF-INTOSC/512 (31.25Khz)
' If INTTSRC=1 and MFIOSEL= 1 then 010 = MF-INTOSC (500Khz), 001 = MF-INTOSC/2 (250Khz) ,000 = MF-INTOSC/16 (31.25Khz)
' Note: INTSRC = OSCTUNE<7> and MFIOSEL = OSCCON2<0>
' Bit 3 - OSTS = 0 - Osc startup time out is ruinning from internal OSC ( HF, MF or LF-INTOSC)
' Bit 2 - HFIOFS =1 ( INTOSC Frq stable bit - 1 = stable , 0 = not stable
' Bits 1-0 - 00= Dephalt Pri OSc ( OSC1/2 or HF-INTOSC with/without PLL set in FOSC,3:0> config1H <3.0>
' 01 = SOSC osc
' 1x = Internal osc ( LF, MF,HF-INTOSC)

' OSCCON2 = $00 ' Bit 7 n/a , Bit 6 - SOSCRUN - Run status bit , Bit 5-4 n/a,
' Bit 3 = SOASCGO - Osc Start control bit 1 = OSC running , 0 = OSC shut off if no requests for it
' Bit 2 n/a , Bit 1 - MFIOFS 1= MFINTOSC stable 0 = Not stable
' Bit 0 MFIOSEL - 1 = MF-INTOSC replaces HF-ISTOSC Freq for 500Khz,250Khz,31.25KHz) 0 = MF-INTOSC not used

OSCTUNE = %01000000 ' Bit 7 - INTSRC - internal LF Source Select 1 = 31.25 from 16Mhz Internal /512 HF-INTOSC ) 0 = Internal 31khz OSC
' Bit 6 - PLLEN - 1 PLL enabled , 0 = PLL disabled
' Bits 5-0 Frequancy callibaration 00000 = centre Frq

WDTCON = %00010000 ' use ultra low power mode when in sleep - disable regulator in sleep mode
' Bit7 = REGSLP- Regulator Voltage Sleep Enable - 1= Reg goes into low-power Mode when in sleep mode ,0 = Reg stay in normal mode
' Bit6= n/a , Bit5 = ULPLVL - Ultra lowpower Wakeup output sel 1= Vout on RA0 0= Vout on RA1 ( no effect if WDTEN in config is set )
' Bit4= SRETEN = Regulator Volt Sleep Disable bit - 1= goes into Ultra lOwpower mode in sleep ( CONFIG1L.0 =0 MUST BE SET)
' Bit3=n/a , Bit2 = ULPEN - Ultra Low Power Wakup Module enable 1 = enabled , 0 = disabled
' Bit1=ULPSINK- Ultra Low-power Wakeup Current Sink Enable 1= Sink enabled 0 = Sink disabled ( Not valid if ULPEN=0 )
' Bit0= SWDTEN -Watchdog Timer Enable = 1= enable watchdog 0 = Disable Watchdog ( no effect if WDTEN in config is set )


PSPCON.4 = 0 ' turn off parallel slave port mode - general purpose I/O mode PORTD & PORTE



INTCON2.6 = 0 ' INTEDG0 - External Interrupt 0 Edge Select - 1= Rising Edge , 0 = Falling Edge
INTCON2.5 = 0 ' INTEDG1 - External Interrupt 1 Edge Select - 1= Rising Edge , 0 = Falling Edge
INTCON2.4 = 0 ' INTEDG2 - External Interrupt 2 Edge Select - 1= Rising Edge , 0 = Falling Edge
INTCON2.3 = 0 ' INTEDG3 - External Interrupt 3 Edge Select - 1= Rising Edge , 0 = Falling Edge

INTCON3.6 = 0 ' INT1IP - INT1 External Interupt Priority - 1 = High Priorty , 0 = Low Priority
INTCON3.7 = 0 ' INT2IP - INT2 External Interupt Priority - 1 = High Priorty , 0 = Low Priority
INTCON2.1 = 0 ' INT3IP - INT3 External Interupt Priority - 1 = High Priorty , 0 = Low Priority

[longpole001]

yep it looks like your right PPl is not avaialble in osc speeds of 1,2Mhz setting

this explains a why i had to set the time0 to 1mhz setting , as well as the USARt2


now if i set the define osc1 , remove the PPl on settings i get compile errors of 101 - invalid osc define , as well as pauseusl, pauseus error 103 ??

[Tabsoft]

Just as Richard said.

Look at FIGURE 3-1: PIC18F66K80 FAMILY CLOCK DIAGRAM in the Datasheet.
Look for the 4xPLL block and you will see what feeds into it.

That should make it clear.

[Tabsoft]

Check the PBP manual for the supported DEFINE OSC values.

[longpole001]

yes the lowest value a define osc will accept is 3

[longpole001]

so since pbp will only accept 3(3.88mhz) or 4 ( 4mhz) as the define osc , it means all the timed commands such as pause , pauseus , RCtime etc are 4 times longer than shown in code ??????????????
if no define osc is given then it assumed to be 4mhz

sort of sucks when u want go low power / osc for a chip

btw in my application the current draw is as follows with only a osc speed change

1mhz = 1.04ma - running , sleep mode = 0.24ma for all settings
2mhz = 1.28ma - running
4mhz = 1.6 ma - running
8mhz = 2.23ma - running
16mhz=3.47ma - running

16mhz - 4mhz + ppl = 1.6ma
32mhz - 8mhz + ppl = 5.96ma
64mhz - 16mhz+ppl = 10.35ma

when powering the device from a small coin battery and when you dont need the higher speed , 1mhz is a better option

although0.56ma is not a lot between 1mhz and 4mhz it still is a waist when it not required to be so , just to satisfy PBP compile setting for 4mhz

cheers
sheldon

[rmteo]

The proper way to do this (low power consumption for battery use) is to use the low power modes of the MCU and NOT to lower the clock speed.

[longpole001]

yes but those measures have been applied , if i did not the power usage would be higher





----------- power down CPU internal modules NOT required to save on power usage ---------
PMD0 = %11111011 ' TURN OFF (bit7-3) na ( bit2)ECAN module( must be on lower power??), Comparator2 (bit1),Comparator1 (bit0)
PMD1 = %11011110 ' TURN OFF (bit7) PSP,(bit6)CTMU,(bit5)ADC MODULE,(bit4)TMR4,(bit3)TMR3,(bit2)TMR2,(bit1)TMR1 ,(bit0)TMR0,
PMD2 = %11111111 ' TURN OFF (bit7) CCP5,(bit6)CCP4,(bit5)CCP3,(bit4)CCP2,(bit3)CCP1,( bit2)UART2,(bit1)UART1,(bit0)MSSP,
' Note : USART2 is tuned on as required

[rmteo]

Yah, but is your CPU in a low power mode such SLEEP when it is doing nothing?

[longpole001]

sleep was the first routine setup for this project



=========== Power Shutdown routine ==================
Shut_Down:

pwr_on = 1 ' PWR ON = 1 = OFF - turns off power to devices external to cpu
@ INT_DISABLE RBC_INT ; TURN OFF PortB IOC Interrupts for RX_mode - RF_IRQ pin
@ INT_DISABLE RX2_INT ; Turn Off USART RX Interrupts for RX_mode - RX input on USART
@ INT_DISABLE TMR0_INT ; disable Timer0 interupts
gosub RF_Powerdown ' shut down rf module
TRISA = $FF ' reduce power usage by puting port to inputs
TRISC = $FF
TRISD = $F7 ' make all ports inputs except portd.3 for PWR_ON output
TRISE = $FF

WPUB = $00 ' Port B set to inputs already , turn off all week pullups

PMD0 = $FF ' TURN OFF ALL PERIPHERALS ON CPU
PMD1 = $FF
PMD2 = $FF

PWR_shutdown = 0 ' CLEAR shutdown flag
INTCON.1 = 0 ' CLEAR INT0 interupt flag prior to enable
@ INT_ENABLE INT0_INT ; Enable INT0 interupt to allow wakeup from Sleep command - Triggered by PWR_SW , active Low
OSCCON.7 =0 ' clear IDLEN bit ready for sleep command
@ sleep ; sleep command
@ NOP

return

[rmteo]

Then why do you need to run at 1MHz? You can achieve an average current consumption of <0.4mA by running the clock at 64MHz (according to data in your post) - far less than the 1.04mA that you are hoping to achieve.

[longpole001]

Then why do you need to run at 1MHz? You can achieve an average current consumption of <0.4mA by running the clock at 64MHz (according to data in your post) - far less than the 1.04mA that you are hoping to achieve.


values are clear but how the sleep function is used is not clear in the posts


if i run the cpu at 1mhz my current usage while on and standing by waiting to do its function are 1.04ma
if i run the cpu at 64mhz my current usage while on and standing by waiting to do its function are 10.35ma


in sleep mode ( waiting for power on button) it is 0.24ma no mater what

[rmteo]

You are not using the features of the MCU correctly. Sleep current of the PIC18F46K80 is anything from 200nA (0.0002mA) to 10uA (0.01mA) depending on temperature and VDD (according to to the data sheet) and not the 0.24mA that you quoted.
7895

Run current at 64MHz is 7-12mA.
7896

So, worst case, your average current will be <0.2mA even running the core at 64MHz. Here'e how:

Active - running @ 64MHz = 12mA * 1/64 = 0.1875mA
Sleeping = 0.01mA * 63/64 = 0.00984375mA
Average = 0.1875 + 0.00984375 = 0.19734375 = < 0.2mA, less than 20% of what you are hoping to achieve at 1MHz.

[longpole001]

the current is measured from the over all ctt drain at the battery , with all other components , not just the cpu alone

the measurments are those read from changes in cpu speed

i will review cpu setting again , , but cant see how to get any lower them any lower by changing settings

[longpole001]

AS further test i built another blank board last night , placed only the 3.3v regulator on , smoothing caps and the cpu
programed the cpu with config , of 64mhz, shut down all services inside the cpu
and did a loop of pause in the main ( eg do nothing
the draw current was - 10ma


if you able to get the figures you suggest in real world then please try cos i cant

cheers

Sheldon

[richard]

and did a loop of pause in the main ( eg do nothing
pause is not sleeping , the cpu is flatout doing nothing useful

[rmteo]

AS further test i built another blank board last night , placed only the 3.3v regulator on , smoothing caps and the cpu
programed the cpu with config , of 64mhz, shut down all services inside the cpu
and did a loop of pause in the main ( eg do nothing
the draw current was - 10ma

if you able to get the figures you suggest in real world then please try cos i cant

cheers

Sheldon
The figure you are seeing is exactly what the data sheet says, run current at 64MHz should be in the range of 7-12mA. Put the MCU to SLEEP and see if it goes down to <10uA range - if not then it is not in SLEEP mode.

Then re-design your application such that it stays in SLEEP mode until it needs to do something useful. ONLY then should it wake and run at full (64MHz) speed, then immediately go back to SLEEP - no waiting in a delay for something to happen. As Richard said, waiting in a delay is not doing anything useful, it is just burning CPU cycles (at full speed and wasting power). This is the proper way to use the low power modes of any MCU and you should then be able to able to get the average run current down to the sub 0.2mA range for operation with coin cells.

[longpole001]

i am slowly redesigning the unit to use less power
one of the main problems i have is that the unit was intended to receive rf when it was not transmitting , not to sleep
but button cells wont last that long when doing that

any way another question has come to light which i am not clear on the answer


i have routine that sets the sleep command
i have a interupt triggered routine to goto when it it wakes up ,
but where does the rotuine return to when its completed

it does not seem to return to the place after the sleep command ??

[rmteo]

...any way another question has come to light which i am not clear on the answer

i have routine that sets the sleep command
i have a interupt triggered routine to goto when it it wakes up ,
but where does the rotuine return to when its completed

it does not seem to return to the place after the sleep command ??
Pseudocode:

mainloop:
Sleep ; go to sleep
on interrupt do something ; wake-up and jump to your ISR
goto mainloop: ; return here

[longpole001]

ok well i tried a lot of combinations

1.but i am not convinced i am truly in sleep mode yet
2. when i trigger the interupt i go to the service routine but it wont go back to the main program


interupt services for interupt priority edge triggers - these seem to be working
as code is exicuted when the triggers occure

the code for " sleep Over "is working as it just turns off/ on the power to the regulator

but the standby power routines are not coming back to the main program

i am using DT routines for interupt support

the main code triggers on flags that send it to the "power_standby" routine which shuts down the ports , clears the required interupts and then sets the sleep mode

int1-3 all call the same interupts service routine that turns the ports back on , external power and run the routines with in it all ok when the triggers occure

BUT ........ from there it never returns to the main program

i have tried moving the sleep comand within the main program
with " if statement triggers " but with no luck so far - see example 2

it seem that when the trigger occures it services the the interupt and then not much more ,

what am i missing

cheers

sheldon





ASM
INT_LIST macro ; IntSource , Label , Type, ResetFlag?

INT_Handler TMR0_INT, _Timer0_Count , PBP, yes ; call Timer0_Count subroutine
INT_Handler RBC_INT, _Rx_mode_IOC , PBP, yes ; Call Rx_mode_IOC subroutine for RF RX_mode
INT_Handler RX2_INT, _Term_RX , PBP, yes ; Call Term_input for terminal char buffer
INT_Handler INT0_INT, _Sleep_Over , PBP, Yes ; Call for INT0 trigger - when exit sleep mode to got sleep over = reset / startup - power button
INT_Handler INT1_INT, _Standby_Over , PBP, Yes ; Call for INT1 trigger - when exit sleep mode to goto standby mode - ctrl button
INT_Handler INT2_INT, _Standby_Over , PBP, Yes ; Call for INT2 trigger - when exit stand mode to goto standby mode - button b
INT_Handler INT3_INT, _Standby_Over , PBP, Yes ; Call for INT3 trigger - when exit sleep mode to goto standby mode - button a
endm
INT_CREATE ; Creates the Interrupt Processor
ENDASM





STANDBY POWER ROUTINE - this is called when the flags are met from the main program - its prepares the cpu power mode as low as can be done and then sets the interupts ready for triggering prior to the sleep mode being set



' =========== Set Standby Power routine ==================
Standby_Power:
' routine to put the handswitch in standby mode waiting to send

EXT_PWR = 1 ' External power off ( active low)
TRISC = $FE ' make all ports inputs except portc.0 for ColA output
TRISD = $F7 ' make all ports inputs except portd.3 for PWR_ON output
TRISE = $FF
PMD0 = $FF ' TURN OFF ALL PERIPHERALS ON CPU
PMD2 = $FF

col_a = 0 ' TURN ON COLA = 0

INTCON3.0= 0
INTCON3.1= 0
INTCON3.2= 0 ' CLEAR INT1-3 interupt flag prior to enable
INTCON.1 = 0 ' CLEAR INT0 interupt flag prior to enable
@ INT_ENABLE INT0_INT ; Enable INT0 interupt to allow wakeup from Sleep command - Triggered by PWR_SW , active high
@ INT_ENABLE INT1_INT ; Enable INT1 interupt to allow wakeup from Sleep command - Triggered by ctrl key , active Low
@ INT_ENABLE INT2_INT ; Enable INT2 interupt to allow wakeup from Sleep command - Triggered by B key , active Low
@ INT_ENABLE INT3_INT ; Enable INT3 interupt to allow wakeup from Sleep command - Triggered by A key , active Low


OSCCON.7 =0 ' clear IDLEN bit ready for sleep command
@ sleep ; sleep command
@ nop


return

' ----------------------------------------------------------







main segment of code that calls the standby routine when flags are correct

example 1



'----------- main program ---------------
Main:



if PWR_standby = 1 and Remote_conf_flag = 0 then gosub standby_power ' if power-standby set and remote conf is not then allow standby mode


Goto main






tried this approche but the same results of it never returns to the main program , which is just moving the standby subrouine into the main " if "statement - no luck there
example 2



'----------- main program ---------------
Main:



if PWR_standby = 1 and Remote_conf_flag = 0 then
EXT_PWR = 1 ' External power off ( active low)
TRISC = $FE ' make all ports inputs except portc.0 for ColA output
TRISD = $F7 ' make all ports inputs except portd.3 for PWR_ON output
TRISE = $FF
PMD0 = $FF ' TURN OFF ALL PERIPHERALS ON CPU
PMD2 = $FF

col_a = 0 ' TURN ON COLA = 0

INTCON3.0= 0
INTCON3.1= 0
INTCON3.2= 0 ' CLEAR INT1-3 interupt flag prior to enable
INTCON.1 = 0 ' CLEAR INT0 interupt flag prior to enable
@ INT_ENABLE INT0_INT ; Enable INT0 interupt to allow wakeup from Sleep command - Triggered by PWR_SW , active high
@ INT_ENABLE INT1_INT ; Enable INT1 interupt to allow wakeup from Sleep command - Triggered by ctrl key , active Low
@ INT_ENABLE INT2_INT ; Enable INT2 interupt to allow wakeup from Sleep command - Triggered by B key , active Low
@ INT_ENABLE INT3_INT ; Enable INT3 interupt to allow wakeup from Sleep command - Triggered by A key , active Low


OSCCON.7 =0 ' clear IDLEN bit ready for sleep command
@ sleep ; sleep command
@ nop

Goto main

endif



STANDBY OVER - INTERUPT SERVICE ROUTINE - This routine is called when the INt1-3 are triggered - it restores the ports to the correct setting and services to the cpu
it calls other rotuines that allows the keys to be activated faster than the normal scan rate would have from the timer0 settings




' ----------------------------------------------------------

Standby_Over:

' RESTORE SETTINGS

Standby_Return = 1 ' stop starup led seq
write $0D,Standby_Return ' stop starup led seq when statup watchdog enabled
INTCON3.0= 0
INTCON3.1= 0
INTCON3.2= 0 ' CLEAR INT1-3 interupt flag aftger trigger

@ INT_DISABLE INT1_INT ; Enable INT1 interupt to allow wakeup from Sleep command - Triggered by ctrl key , active Low
@ INT_DISABLE INT2_INT ; Enable INT2 interupt to allow wakeup from Sleep command - Triggered by B key , active Low
@ INT_DISABLE INT3_INT ; Enable INT3 interupt to allow wakeup from Sleep command - Triggered by A key , active Low

TRISC = %11010000 ' setup Port C input=1,output=0 for I/O pins
TRISD = %00010000 ' setup Port D input=1,output=0 for I/O pins
TRISE = %00001101 ' setup Port E input=1,output=0 for I/O pins


EXT_PWR = 0 ' TURN ON EXTERNAL POWER



gosub get_volts ' get the battery level
gosub get_key_scan ' after standby-reset do a key scan to check on key being pressed
T0Count5 = 400 ' set to 400 to all timer 0 to clear WDT flag set PWR_standby = 0 to allow main routine call standby agaiin after timeout


@ INT_RETURN
return

[towlerg]

but i am not convinced i am truly in sleep mode yet

One definitive way to know that you are in sleep mode is to temporarily set fuses for one of the CLKOUT modes and monitor the clock out pin.

George

[longpole001]

well from the current draw dropping when the sleep command is invoked , to when it is commented out i can see it must be in sleep mode ,

[longpole001]

any thoughts guys on what i may have forgot ?

[longpole001]

OK after alot of time and testing found the issues

it was not as simple at it may have appeared , and a combination of the hardware and the firmware changes fixed my issues
some of the problems solved were mainly to do with how the edge interupts were enabled and triggered

i found by adding some delay between setting the trigger points and enabling the keys that trigger helped
also that i forgot that when i turn off external power to modules 1 did not retain the settings and need to be redone in the ISR

these gave the impression that the ISR was not returning to the main program , where it was mainly how it was triggered and retriggered


cheers

Sheldon