PWM on PORTG pin 3 on a 18F67k22

[longpole001]

Hi guys ,

i am trying the get PWM (CCP4) output to work on PortG.3 of the 18F67k22 series

what i am seeing so far is that the port seems to put out some pulses then stops , so it seems that i have part of the setup correct

i am thinking that i am also effecting other ports with the setting as other activity on portF , and G seem to sometimes have an effect , but i cant seem to isolate exactly what it is so far

the output pulses rates etc dont matter at this point just as long as it outputs all the time for a test of the PWM function on this pin only

what am i missing


cheers

sheldon


http://ww1.microchip.com/downloads/en/DeviceDoc/39960d.pdf




' ------- Setup port G Variables ----------
' port G has 6 I/O only , G5 - Always input ( uses CONFIG3H - MCLRE = OFF for I/O use)
CM3CON = 0 ' Disable comparator 3 on PORTG

ANCON2.0 = 0 ' Set PortG:4 Analog / Digital allocation - 0 = digital ,1 analog - ANSEL16
ANCON2.1 = 0 ' Set PortG:3 Analog / Digital allocation - 0 = digital ,1 analog - ANSEL17
ANCON2.2 = 0 ' Set PortG:2 Analog / Digital allocation - 0 = digital ,1 analog - ANSEL18
ANCON2.3 = 0 ' Set PortG:1 Analog / Digital allocation - 0 = digital ,1 analog - ANSEL19

TRISG = %00100000 ' ports Output , Row_1 output portG.5 always input ( internal pullup) VPP/MCLR ,CCP4 output
FLASH_CE var PORTG.2 ' FLASH CE - active low - uses SPI bus
PWM_TEST VAR PORTG.3 ' CCP4 - PWM outout to control the contrast on glcd


PORTG = %00100000 ' Clear Outputs ,
flash_ce = 1 ' set high as active low
PWM_TEST = 0 ' active high








'---------- PWM OUTPUT REGISTER SETUP ---------------------
' setup CCP4 - PORTG.3 for PWM_CONTRAST control
' PWM FRQ = 1/PWM period
' When TMR2 = PR2 = start of duty cycle(on Time ) , start of period length
' when TMR2 = CCPR4L:CCP4CON5:4 = End of duty cycle , START OF OFF TIME
' when TMR2 = PR2 = End of period , start of duty cycle AGAIN


CCPTMRS1 = %00000000 ' select TM1/TM2 for CCP4 use ( TIMER2 used for PWM)
CCP4CON = %00001100 ' Setup CCP4 single output for PWM , bits 3,2 , bits 5,4 = 9th and 10 bit of duty cycle ,
CCPR4L = 100 ' Lower Byte register for DUTY CYCLE OF PWM - 8 bits of duty cycle
ODCON2.1 = 0 ' set CCP4OD pin not enabled FOR OPen drain
PR2 = 100 ' set the PWM period = [(PR2+1)x 4xTosc / TM2 prescale value
T2CON = %00000101 ' Timer 2 ON - POSTSCALLER SETTING NOT USED BY PWM , OLY PRESCALE SETTING - PRESCALE: 00 =1 ,01 = 4,1x = 16
' ( bit 7 = x, bit6-3 postscale, bit2=0 timer off ,bit1-0 = prescale )
TMR2 = 200

[EarlyBird2]

This is a HPWM pin?
Why not use HPWM you must have your reasons I guess.

[longpole001]

steve this is the first time i need a hardware based pwm , so dont assume i got it right

[longpole001]

i did use darrel software based one before , but i need this pwm to be set and forget , and not use up cpu time if it were based as software

[longpole001]

and from what i read HPWM command has a speed limitations and the settings are often best set in via the registers directly

[richard]

hpwm is set and forget
the only limitations are max freq = 32767hz min freq depends on fosc , and the pwm resolution is 8 bits , should be adequate for lcd contrast control.

in your example depending on fosc the tmr2 prescale value is way to low try 16 the pwm resolution might only be about 4 bits (read the data sheet)

[longpole001]

i think i found my mistake steve, a solder bridge on the output to another pin that was being set , which caused an issue when the PWM was output

d

[longpole001]

ok thanks richard i am tryng the to get a contrast control working for neg voltage , came across this example , see attached

i still want to have a trim pot , which will set the default value so the lcd is viewable regardless , as well a setting it up via software , to get better viewable / allow temperature change

have you come across other working examples for negative bios contrast controls

[richard]

I use something like this , note drive fet pin high at reset and gradually decrease the pwm till the contrast is good

[longpole001]

that example looks like the display contrast control only swing between vdd and vss , not a negative voltage of vee ???

[richard]

its actually a switch mode power supply that creates the 0-12v contrast voltage , the output voltage is inversely proportional to the pwm

http://www.digikey.com/en/articles/techzone/2012/oct/generating-negative-output-from-positive-input-voltage

[richard]

a better link
http://www.jaycar.com.au/images_uploaded/dcdcconv.pdf
see fig 3

[longpole001]

thanks richard , the second link helped clear why it works ,

i happened to have LM324 onhand and the first cct seems to work well , changing the r4, r9 in the diagram to 200k pot allows easy way to set the best display level as a dephalt setting for the display that is in use for testing , and will go back to a set resistors now that it has been found

the display i am using has a -9.5v VEE generated output , seems best display with -7v ( relative to GND) applied to to V0

for anyone using this cct the OP amp series LM321( single) LM358(duel),LM324(quad) , has a voltage range of upto 32v ( combined 5v + VEE = 32v( VEE upto -27v))

ill do further testing , but i found the best results to be for a freq of 1300 , which gave a smooth voltage output from the op amp , a duty of 140 , ranging from 80 - 200 gave a voltage shift of +/- 2V from pot setting

in the end it was alot easier to use the HPWM command , as the freq required was well below 32767Hz no direct chip register setting up was required

cheers guys