suggestion on how to implement duel /quad spi interface

[longpole001]

HI Guys , most new spi FLASH allow for dual / quad spi interface to the pic

can any one advise how this might be done in PBP using the shiftin shiftout command ?

i assuming if dual you would get a word return , quad you would get 4 bytes ???


regards

Sheldon


http://www.winbond.com/NR/rdonlyres/7EB3B29C-1B35-421C-AA24-F430B51C776A/0/W25Q16BV.pdf

[richard]

in dual mode you get 2 bits for every spi clk pulse one bit on each 1/0 pin from the flash chip ,
in quad mode its 4 bits on 4 pins , you would need to write your own spi routines for either method ,I think hardware spi is about a good as you gunna get. with a 16f1825 chip I can do 2mbs easy with hardware spi (32mhz clk and for small bursts of course)

[longpole001]

yes no mater what shiftin/shiftout will get in/ out 1-8 bits per command and i cant see how to make it shift out /in more than 1 data pin synchronously ???

[HenrikOlsson]

Hi Sheldon,
You can't do that with SHIFTIN/SHIFTOUT (without modifying the underlaying ASM routines of course (don't do that)).
You need to write the routines yourself, shouldn't be that hard to do I don't think. But, as Richard points out, using the MSSP module in SPI mode will probably give you equal (or better) performance compared to a bitbanged dual SPI setup.

/Henrik.

[richard]

just to make things clear shiftin/shiftout will get in/ out 1-8 bits per command is just wrong .
shiftin/shiftout can process however many bits you require for as many vars as specified in the command (even 32 bit longs) but always 1 bit at a time

[longpole001]

did not know that shiftin out did more than 8 bit at a time , nice to know ,

i ll take a look at the how it may be done with the MSSP , be nice feature to have running when i get the flash chips that have the duel/ quad interface .
project on hand does not need it but future ones will

the example code i have on hand that uses the MSSP is as follows , suggestions on how this maybe changed






' --- Hardware SPI / SSP register variables ---------------------------
SSPEN Var SSPCON1.5 ' SSP enable
WCOL Var SSPCON1.7 ' SSP write collision
BF Var SSPSTAT.0 ' SSP buffer full
SSPIF Var PIR1.3 ' SSP interrupt flag


SPI_init:

SSPSTAT = %00000000 ' Sample at middle of data output time, Mode 1, 1: Transmit on idle to active clock transition.
SSPCON1 = %00010000 ' SPI master mode, clock = Fosc/64, Mode 1, 1: Clock idle high.
SSPEN = 1 ' Enable hardware SPI port.

return



Readbyte:
SDC_data_in = SSPBUF ' Clear the buffer.
SSPIF = 0 ' Clear the interrupt flag.
SSPBUF = $ff ' Shift out a dummy byte.
While !SSPIF ' Wait for receive byte.
Wend
SDC_data_in = SSPBUF ' Get the byte.

return

writebyte:

SDC_data_in = SSPBUF ' Clear the buffer.
SSPIF = 0 ' Clear the interrupt flag.
SSPBUF = SDC_data_out ' Send the byte.
If (WCOL) Then Return ' Check for write collision.
While !SSPIF ' Wait for send to complete.
Wend
return

[HenrikOlsson]

Hi Sheldon,
I'm not sure but I think there might be some confusion going on here.
Neither SHIFTIN/SHIFTOUT nor the MSSP module will be able to handle dual or quad SPI interface - period.
If you're going to do it you'll have to bitbang it yourself which, again, is probably slower than doing it "normaly" with the MSSP module.

The thing with dual and quad SPI is that it's getting closer to a parallell bus. With dual SPI there are two datalines and with quad SPI there are four (instead of one) that get sampled on the active edge of the clock. SHIFTIN/SHIFTOUT doesn't support it and the MSSP module only have one data line input so it's impossible.

/Henrik.

[longpole001]

thanks henrik, i did misunderstand that