Configuration bits 18F45K20

[robertg]

Attempting to set configuration bits using PB pro 3 and running version 8.88 MPIDE and trying to work out how to set and use the internal oscillator as follows

#CONFIG
__CONFIG _CONFIG1H, _FOSC_HS_1H
#ENDCONFIG


If I replace HS with either INTOSCIO or INTOSC it fails to compile with:
Error[113] C:\PIC\WORK\RF_REMOTE2.ASM 30 : Symbol not previously defined (_FOSC_INTOSC_1H)

Could someone please advise what probably something simple that I'm missing.

Thanks,

Rob.

[HenrikOlsson]

Hi,
As far as I can see It's either INTIO7 or INTIO67 depending on if you want ClkOut on RA6 or not.

Remember that when adding your own CONFIG like this ALL of the PBP default ones gets thrown out the window and replaced with yours instead. It's not only changing ones you give it. So, it's usually best to copy the default ones and then change and/or add to them or there's a quite a chance of you missing something.

#CONFIG
CONFIG FOSC = INTIO67 ; Internal Oscillator, no clock out
CONFIG FCMEN = OFF ; Fail-Safe Clock Monitor disabled
CONFIG IESO = OFF ; Oscillator Switchover mode disabled
CONFIG PWRT = OFF ; PWRT disabled
CONFIG BOREN = SBORDIS ; Brown-out Reset enabled in hardware only (SBOREN is disabled)
CONFIG BORV = 18 ; VBOR set to 1.8 V nominal
CONFIG WDTEN = ON ; WDT is always enabled. SWDTEN bit has no effect
CONFIG WDTPS = 512 ; 1:512
CONFIG CCP2MX = PORTC ; CCP2 input/output is multiplexed with RC1
CONFIG PBADEN = OFF ; PORTB<4:0> pins are configured as digital I/O on Reset
CONFIG LPT1OSC = OFF ; Timer1 configured for higher power operation
CONFIG HFOFST = ON ; HFINTOSC starts clocking the CPU without waiting for the oscillator to stablize.
CONFIG MCLRE = ON ; MCLR pin enabled; RE3 input pin disabled
CONFIG STVREN = ON ; Stack full/underflow will cause Reset
CONFIG LVP = OFF ; Single-Supply ICSP disabled
CONFIG XINST = OFF ; Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
CONFIG DEBUG = OFF ; Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins
CONFIG CP0 = OFF ; Block 0 (000800-001FFFh) not code-protected
CONFIG CP1 = OFF ; Block 1 (002000-003FFFh) not code-protected
CONFIG CP2 = OFF ; Block 2 (004000-005FFFh) not code-protected
CONFIG CP3 = OFF ; Block 3 (006000-007FFFh) not code-protected
CONFIG CPB = OFF ; Boot block (000000-0007FFh) not code-protected
CONFIG CPD = OFF ; Data EEPROM not code-protected
CONFIG WRT0 = OFF ; Block 0 (000800-001FFFh) not write-protected
CONFIG WRT1 = OFF ; Block 1 (002000-003FFFh) not write-protected
CONFIG WRT2 = OFF ; Block 2 (004000-005FFFh) not write-protected
CONFIG WRT3 = OFF ; Block 3 (006000-007FFFh) not write-protected
CONFIG WRTC = OFF ; Configuration registers (300000-3000FFh) not write-protected
CONFIG WRTB = OFF ; Boot Block (000000-0007FFh) not write-protected
CONFIG WRTD = OFF ; Data EEPROM not write-protected
CONFIG EBTR0 = OFF ; Block 0 (000800-001FFFh) not protected from table reads executed in other blocks
CONFIG EBTR1 = OFF ; Block 1 (002000-003FFFh) not protected from table reads executed in other blocks
CONFIG EBTR2 = OFF ; Block 2 (004000-005FFFh) not protected from table reads executed in other blocks
CONFIG EBTR3 = OFF ; Block 3 (006000-007FFFh) not protected from table reads executed in other blocks
CONFIG EBTRB = OFF ; Boot Block (000000-0007FFh) not protected from table reads executed in other blocks

; #ENDCONFIG

[robertg]

Thanks Henrik!

That worked, but where did you find all those configuration bits? I've looked high an low but all documentation I've seen refers to INTOSCIO or INTOSC or something along those lines?

Rob.

[HenrikOlsson]

Hi Rob,
Have you looked in the manual ;-)

In section 4.9, #CONFIG....#ENDCONFIG it says (among other things):

Microchip determines the form and syntax of the actual configuration directives, and they are not consistent for different families of PIC microcontrollers. We have attempted to include the information for each chip in a device information file. The files are located in your PBP install in the Device Reference folder. (PIC16F877.INFO, PIC18F4620.INFO, etc.)

That's where I found it.

/Henrik.

[robertg]

Hi Henrik,

Guess I didn't read that section!! :-(

Rob.