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iw2fvo
- 10th July 2013, 09:32
Good day to all of you in this forum.
I am using the pic 18f452 with a 4.0 Mhz xtal and I want to use the HS PLL to have a 40 Mhz system clock.
With the program listed below I should have a square wave output at 2 msec period.
I have 5 msec period intead.
I am not understanding where the problem lies.
Any help is appreciated.
Thanks
Ambrogio

';Program Configuration Register 1H
@ __CONFIG _CONFIG1H, _OSCS_OFF_1H & _HSPLL_OSC_1H

';Program Configuration Register 2L
@ __CONFIG _CONFIG2L, _BOR_OFF_2L & _BORV_20_2L & _PWRT_ON_2L

';Program Configuration Register 2H
@ __CONFIG _CONFIG2H, _WDT_OFF_2H & _WDTPS_128_2H

';Program Configuration Register 3H
@ __CONFIG _CONFIG3H, _CCP2MX_OFF_3H

';Program Configuration Register 4L
@ __CONFIG _CONFIG4L, _STVR_OFF_4L & _LVP_OFF_4L & _DEBUG_OFF_4L

';Program Configuration Register 5L
@ __CONFIG _CONFIG5L, _CP0_OFF_5L & _CP1_OFF_5L & _CP2_OFF_5L & _CP3_OFF_5L

';Program Configuration Register 5H
@ __CONFIG _CONFIG5H, _CPB_OFF_5H & _CPD_OFF_5H

';Program Configuration Register 6L
@ __CONFIG _CONFIG6L, _WRT0_OFF_6L & _WRT1_OFF_6L & _WRT2_OFF_6L & _WRT3_OFF_6L

';Program Configuration Register 6H
@ __CONFIG _CONFIG6H, _WRTC_OFF_6H & _WRTB_OFF_6H & _WRTD_OFF_6H

';Program Configuration Register 7L
@ __CONFIG _CONFIG7L, _EBTR0_OFF_7L & _EBTR1_OFF_7L & _EBTR2_OFF_7L & _EBTR3_OFF_7L

';Program Configuration Register 7H
@ __CONFIG _CONFIG7H, _EBTRB_OFF_7H

' ************************************************** **************************************


DEFINE OSC 40
INCLUDE "MODEDEFS.BAS"

pippo:

high portd.1
pause 1
low portd.1
pause 1

goto pippo

rmteo
- 10th July 2013, 10:19
You are not going to get 40MHz with a 4MHz crystal. PLL gives x4 of the input frequency which is 16MHz in your case. See the device datasheet.

iw2fvo
- 10th July 2013, 11:30
thanks Rmteo,
It is my fault .
I have to use 10 Mhz xtal to get 40 Mhz !

Is this Cortex programmable in Pbasic too ?
Thanks
Ambrogio

rmteo
- 10th July 2013, 12:05
Sorry, no.