PGC (ICSPCLK) Conflicts with Vref ?

[dsicon]

on the 16F690
i need to use the Vref pin for a reasonably accurate non-ratiometric AD conversion
my plan was to attach to RA1 a low impedance voltage reference, type TBD

but that same pin is the ICSPCLK (PGC) pin for programming the chip pin on board (ISP), what were they thinking ?

can i just use a resistor to stand it off?,
i don't want to pull and replace a jumper every time i burn and crash during development
am using the MEL programmer

[Charles Linquis]

A resistor will isolate the two. 2K is probably a good value. Anything larger may compromise the accuracy of Vref, but check the input current on the Vref pin for your device to make certain.

[dsicon]

thanks for your reply

i really don't understand the terrible choice of pin assignments here

i checked the data sheet and i see 10uA Vref current max, at 2.5Vref that would be about 8 LSBs at 2K

so i don't think that is acceptable

and then there is a whopping 1mA during acq which i guess is off the table ?

my thought at the moment (since i must have ISP and do not want to jump/unjump the ref during flash and crash development) is that i will use Vref = VDD and put a trimmer (yuck) on the VDD reg to get the tweaks right

i ran into this same sort of conflict on the same pin a while back while using the ULPW cap on that same pin