1Hz clock using Timer3, 32.768kHz crystal and runs badly on 18F26k22

[Chris Barron]

I have been building clocks for a while and have sometried and tested code which works great on an 18F25k22. I need to add some more features to the device which uses this so I am stepping up to the 18f26k22 just for the larger memory.

When i run the code which worked on the 18f25k22 on the 18f26k22, the clock increments randomly by 2 seconds when it should only increment by 1.

I have a 32.768kHz on the secondary oscillator input pins (with suitable caps)
Using timer 3, no prescaler and prelaod of 128 in TMR3H each epoch.

An interrupt is generated every 1 second when timer 3 rolls over and my code simply increments the 'Seconds' register...when that reaches 60 it is reset and minutes is incremented and so on.

The code has been perfectly behaved on the 25k22, but now, compiled for the 26k22 the seconds counter is sometimes incremented by 2 when it should only increment by 1

I have tried adding new variable for seconds called Seconds2 ( in case it was a memory location issue. I have tried stopping the timer3 from running, T3CON.0 = 0, before writing to it. I have tried everything I can think of, but I can't seem to get it to behave with the 26k22.

I have several boards of identical circuits, whichever has the 26k22 chip has the problem and the fault moves with the chips. I have had this with a batch of SDIP 26k22's and a couple of SOIC 26k22's

I've looked at the .inc files (Pbasic and Mchip's own) and can't see any reason for a difference between these devices, so now I am stuck, is it a Pbasic issue or a MPASM issue ? The only difference between these two chips is that the 26k22 gains 32k more memory over the 25k22, otherwise they seem to be identical.

Has anyone got any experience with something as odd as this ? For comparisons I've used CPFSEQ and CPFSGT instead of the longhand XORLW too, but nothing makes an difference. It is almost as if with the 26k22 version the TMR3 overflow isn't interrupt isn't being cleared and the code is run through twice, but I am clearing the interrupt and reloading the TMR3 registers manually.


Chris



btfss PIR2,1 ; timer 3 rollover interrupt ? (1 second epoch)
bra INT_OUT
bsf _power
btfss PORTA,0
bcf _power
bcf T3CON,0 ; stop TMR3 prior to writing to it
movlw 128
movwf TMR3H
movf _timer3l_buffer,w ; compensation value for low voltage
btfss STATUS,Z
movwf TMR3L
bsf T3CON,0 ; re enable TMR3 after writing
bsf _control,6 ; set 1 sec flag
bcf PIR2,1 ;clear interrupt
incf _seconds2,f
movlw 60
xorwf _seconds2,w
btfss STATUS,Z
bra INT_OUT
clrf _seconds2
incf _Minutes,f
movlw 60
xorwf _Minutes,w
btfss STATUS,Z
bra INT_OUT
clrf _Minutes
incf _Hours,f
movlw 24
xorwf _Hours ,w
btfss STATUS,Z
BRA INT_OUT
clrf _Hours
bsf _control,2 ; set 'NEW DAY' flag

[Chris Barron]

I have an update on this issue.
In my ISR I have interrupts created by timer 1 and timer 3. Timer 1 is used as a one-shot timer and timer 3 is used as the low frequency 1Hz generator.

Timer 1 and timer 3 are identical peripherals, so I have simply renamed timer 1 registers to timer 3 registers and vice versa, and now the code works well on 26k22 as well as 25k22, with timer 1 running the 1 second epoch code.

The only difference between timer 1 and timer 3 is that they use different peripheral interrupt enable registers, maybe there is an issue with that ?

Chris

[BH_epuk]

Hi Chris

I had this problem on a 24k22, turned out to be the TxRD16 bit of TxCON being set for 16bit mode. Changing this to 8 bit mode solved it for me.

[Chris Barron]

Hi Chris

I had this problem on a 24k22, turned out to be the TxRD16 bit of TxCON being set for 16bit mode. Changing this to 8 bit mode solved it for me.

Hi, thanks for that.
I did get around to suspecting that and tried changing between 16-bit and 8-bit modes but there was no difference - and I couldn't explain how it would make a difference because the 25k22 and 26k22, which use identical registers.

The only difference between the two timers seems to be that they use different interrupt registers, not between devices though, so I still can't quite explain how the fault occurs

[MOUNTAIN747]

Chris,
I am trying to make the leap from 16F’ to 18F’s. I want to start with the 18F25k22. Would you mind sharing some 25k22 code? I would be interested in what your config’s look like for your 25k22 clock project?
Thanks!
Wayne

[Chris Barron]

Hello Wayne,
there is probably little point in using my configs, unless yoiu plan to set up your pic to mimic mine.
Your best way top approach it is to decide which peripherals you would like to use first of all, and then look in the MPASM directory for the 18F25k22.inc file. At the end of that file all of the correct mnemonics for the configs are listed.
I generally copy the ones I want to use from the Microchip include file and put them in the Picbasic 18f25k22.inc include file to enable them.

Chris

[HenrikOlsson]

Hi,
Just a reminder that this has changed in PBP3, if that's what you have. There's no longer any need to edit .inc files etc, instead use #CONFIG/#ENDCONFIG to override the defaults. Also take a look a the DEVICE_REFERENCE folder of the PBP install folder, there you'll find a .INFO file for each supported PIC outlining the available configs etc. The .INFO is just a plain text file so you can open it Notepad or MCSP or whatever.

For example, here a config block for the 18F25K22 on a project of mine (requires PBP3)

#CONFIG
CONFIG FOSC = HSMP
CONFIG PLLCFG = ON
CONFIG PBADEN = OFF
CONFIG MCLRE = EXTMCLR
CONFIG LVP = OFF
CONFIG XINST = OFF
#ENDCONFIG

Obviously this doesn't contain ALL the CONFIGs - just the ones I was currently interested in. Again, very easy and flexible, no need to edit files etc.

/Henrik.

[MOUNTAIN747]

Thank you Chris and Henrik for your comments.

I am using MCSP, PBP 2.60c, and MPLAB8.83. When I compile from MCSP I get a statement “18F25K22.INC not found”, in addition to other errors. In PBP I have three files for 18F25K22. 18F25K22.INC, 18F25K22.Visual Basic Module, 18F25K22.BAL are in C:\PBP.

There is NO M18F25K22.INC in C:\PBP\INC.

If I understand what you are saying, I should copy the P18F25K22.INC from C:\Microchip\MPASM Suite into PBP\INC. Is that correct? If so, should I call it M18F25K22?

I also find in C:\Mecanique\MPASM has INC files. There is NO P18F25K22 in this folder. Should there also be a P18F25K22 file in this folder?

Thank you for your help. I’ve been working with this for several days, reloaded all my programs and updating from PBP2.60, 2.60a, 2.60c. My forehead feels like mister-e’s after banging the keyboard for hours!
Wayne

[HenrikOlsson]

Hi,
There should be a 18F25K22.INC, a 18F25K22.BAS and a 18F25K22.BAL file in the PBP folder and there should be a P18F25K22.INC in the MPASMSuite folder. If you need to EDIT the configs (for PBP versions PRIOR to 3.0) the file you should edit is the 18F25K22.INC in the PBP folder. You should not copy and or rename any files.

My 18F25K22.INC file in C:\PBP looks like this (this is for v2.6):

;************************************************* ***************
;* 18F25K22.INC *
;* *
;* By : Leonard Zerman, Jeff Schmoyer *
;* Notice : Copyright (c) 2010 microEngineering Labs, Inc. *
;* All Rights Reserved *
;* Date : 05/11/10 *
;* Version : 2.60a *
;* Notes : *
;************************************************* ***************
;Edited 2011-03-02 //Henrik
;Commented out configs in order to set in code
NOLIST
ifdef PM_USED
LIST
"Error: PM does not support this device. Use MPASM."
NOLIST
else
LIST
LIST p = 18F25K22, r = dec, w = -311, w = -230, f = inhx32
INCLUDE "P18F25K22.INC" ; MPASM Header
; __CONFIG _CONFIG1H, _FOSC_INTIO67_1H
; __CONFIG _CONFIG3H, _PBADEN_OFF_3H
; __CONFIG _CONFIG4L, _LVP_OFF_4L & _XINST_OFF_4L
NOLIST
endif
LIST
EEPROM_START EQU 0F00000h
BLOCK_SIZE EQU 64

As you can see I've commented the default __CONFIG lines here so that I could have them in my program instead. You can do that OR edit the the file to match your needs but DO back it up before changing.

I don't know why it says it can't find your 18F25K22.INC if it's there. If you happen to have multiple versions of the compiler make sure you're executing the correct one. Also make sure that MCS is indeed pointing to the correct MPASMSuite folder (if you have multiple versions installed), it's usually something like C:\Program Files\Microchip\MPASMSuite\

/Henrik.

[MOUNTAIN747]

Henric, thanks for your comments,
GO IT! Man what an ordeal. You gave me the key when you said, “it's usually something like C:\Program Files\Microchip\MPASMSuite\”. I had not noticed that I had used “ Find Automatically” for the MPASM file on both computers. MCSP went to Mecanique\MCSP\MPASM. As soon as I used “Find Manually” and located in MPLAB…… All IS Well in the world... I get a small black screen for a few seconds and then "Success xxx bites".

Thanks a bunch! Thanks a bunch! Thanks a bunch!

Wayne

[Chris Barron]

Good shout Henrik.

If it is any consolation Wayne you won't be the first or the last to be stumped in that way.

Now, if you ever find out why Timer 3 didn't behave the same as Timer 1 for me, feel free to let me know !

Chris

[MOUNTAIN747]

Chris, I'll let you know when I find out! I feel like a dummy for stumbling over that one. I am supprised MCSP would make that blunder when it was looking for MPLAB\MPASM. Oh Well, Automatic is not always Automatic...

[BH_epuk]

Chris
A thought accured to me RE timer 3. did you check the configuration bits in CONFIG3H?

bit 4 T3CMX: Timer3 Clock Input MUX bit
1 = T3CKI is on RC0
0 = T3CKI is on RB5


MOUNTAIN747

This is an example of config bit for the 18F2x/4xK22 devices based on PBP 2.60C


asm
__CONFIG _CONFIG1H, _FOSC_INTIO67_1H & _PLLCFG_OFF_1H & _PRICLKEN_ON_1H & _FCMEN_OFF_1H & _IESO_OFF_1H
__CONFIG _CONFIG2L, _PWRTEN_ON_2L & _BOREN_OFF_2L & _BORV_285_2L
__CONFIG _CONFIG2H, _WDTEN_NOSLP_2H & _WDTPS_512_2H
__CONFIG _CONFIG3H, _CCP2MX_PORTC1_3H & _PBADEN_OFF_3H & _CCP3MX_PORTB5_3H & _HFOFST_OFF_3H & _T3CMX_PORTB5_3H & _P2BMX_PORTC0_3H & _MCLRE_EXTMCLR_3H
__CONFIG _CONFIG4L, _STVREN_ON_4L & _LVP_OFF_4L & _XINST_OFF_4L & _DEBUG_OFF_4L
__CONFIG _CONFIG5L, _CP0_OFF_5L & _CP1_OFF_5L
__CONFIG _CONFIG5H, _CPB_OFF_5H & _CPD_OFF_5H
__CONFIG _CONFIG6L, _WRT0_OFF_6L & _WRT1_OFF_6L
__CONFIG _CONFIG6H, _WRTC_OFF_6H & _WRTB_OFF_6H & _WRTD_OFF_6H
__CONFIG _CONFIG7L, _EBTR0_OFF_7L & _EBTR1_OFF_7L
__CONFIG _CONFIG7H, _EBTRB_OFF_7H

ENDASM

You'll probably have to change to suit your application, but the above covers all the configs as a starter.
any Q's fell free to ask, I'm working on a project using the 44K22 at the moment so know the datasheet quite well.

[MOUNTAIN747]

BH_epuk, thanks for the update. I've just stated on the k22's data sheet. I know this is going to be a fun PIC to work with. AND, I may have some questions for you after I digest the next 300 pages!
Thanks
Wayne

[Chris Barron]

Chris
A thought accured to me RE timer 3. did you check the configuration bits in CONFIG3H?

bit 4 T3CMX: Timer3 Clock Input MUX bit
1 = T3CKI is on RC0
0 = T3CKI is on RB5


MOUNTAIN747


I'm not sure that could be the cause given the unreliability of the fault. If set up incorrectly it would work consistently poorly. As it is, the 1 second epoch is always on time (suggesting that the correct count of 32768 pulses from the crystal are being used).

The symptom is that sometimes in the ISR, the interrupt bit for the Timer 3 overflow interrupt doesn't clear when instructed to do so.

Normal operation is that the timer overflows, an interrut is generated, which is then services and cleared, and one second gets added to the Seconds counter.
Sometimes, the Seconds counter increments by two instead of one, suggesting that the ISR is called twice and the TMR3 interrupt is serviced twice for only one TMR3 overflow condition.

[Demon]

...Sometimes, the Seconds counter increments by two instead of one, suggesting that the ISR is called twice and the TMR3 interrupt is serviced twice for only one TMR3 overflow condition.


Totally off the top of my head; are you supposed to disable the interrupt handler as soon as you enter your interrupt routine and then re-enable it before leaving?

(I forgot assembler, 1983 is a long time away from now)

Robert