Interrupt on RB port change with PIC18F23K20

[microuser]

Hello all, I'm trying to make a low power app that use interrupts on RB4-5-6-7 port change.
The problem is that it's always awake so LD1 blink continuously. Portb internal pull-up are enabled so I want interrupt when RB4-5-6-7 goes low.
This is my test code:


OSCCON = %01001110 '1MHz int osc
ANSEL = 0
ANSELH = 0
ADCON0.0 = 0
CCP1CON = 0
CCP2CON = 0
REGISTER
CM1CON0.7 = 0
CM2CON0.7 = 0
CVRCON.7 = 0
CVRCON2.7 = 0
HLVDCON.4 = 0
INTCON.3 = 1
INTCON.4 = 0
INTCON2.7 = 0
SSPCON1 = 0
TRISB=%11111111
IOCB.7=1
IOCB.6=1
IOCB.5=1
IOCB.4=1

SW1 VAR PORTB.4
SW2 VAR PORTB.5
SW3 VAR PORTB.6
SW4 VAR PORTB.7

LD1 VAR PORTA.0

HIGH LD1
INTCON.0=0

ciclo:
TOGGLE LD1

IF (SW1 == 0) THEN
HIGH LD2
ENDIF

ASM
sleep
ENDASM


INTCON.0=0
LOW LD2
pause 100

goto ciclo


can someone help me to understand where is the problem (probably I miss something) and how to make it works?
very thanks!

[mackrackit]

You are close, you have many of the elements required.

Go to your manual and take a look at ON INTERRUPT. You should be able to see what is missing.

When you say "low power", are you wanting the chip to sleep until a button is pressed?

[mister_e]

no need for any ON INTERRUPT here. One thing you MUST look at first is if RB_INT can wake up the PIC. Also double check your configuration fuses AND all INT related registers. INTCON and the likes.

[mackrackit]

Yup, but the OP did ask about interrupts, so I figured he may as well start with the basics...;)

[mister_e]

I know Dave but looking at the original code



ASM
sleep
ENDASM

should have give you some pointer? OK OK OK I'm being a smart a55 as usual :D
</pre>

[sayzer]

PORTB change interrupt interrupts twice when :
first > the pin goes low
Second > the pin goes high.

Thus, pin toggle happens twice and ends up at the same state.
You should use a flag, or bounce until the second interrupt occurs.

____________

[Acetronics2]

This interrupt can wake the device from the Sleep
mode, or any of the Idle modes. The user, in the
Interrupt Service Routine, can clear the interrupt in the
following manner:


a) Any read or write of PORTB to clear the mismatch
condition (except when PORTB is the
source or destination of a MOVFF instruction).



b) Clear the flag bit, RBIF.




A mismatch condition will continue to set the RBIF flag bit.

Reading or writing PORTB will end the mismatch
condition and allow the RBIF bit to be cleared. The latch
holding the last read value is not affected by a MCLR nor
Brown-out Reset. After either one of these Resets, the



RBIF flag will continue to be set if a mismatch is present



a great classical ... :rolleyes:


I didn't see anything about the WDT nor ... but config is not shown ... :rolleyes:


Alain