bob425
- 15th October 2010, 01:10
I am building a MOSFET PWM speed control for a brushed DC motor and want to minimize the commutation spikes using current control. Using higher rated components and a capacitor increases the design cost.
The motor current rises quickly at pulse turn-on, peaks at about 25% through the commutation cycle, declines to about 90% around 3/4 of the way through the cycle. Then followed by a quick current rise above the first rise (tail-end current or voltage spike) just prior to the commutation cycle end.
Since DC motor PWM speed control varies the amount of energy in the motor coil(s), I have considered using a phase and voltage biased high speed comparator into an AND chip to begin 'slowly' ramping down the MOSFET current prior to the end of the commutation.
This biased high-speed comparator would be provided perhaps, a sine wave several orders of magnitude greater than the base PWM clock rate.
This current ramping down would begin at the '75%' pulse low point to zero current flow by the end of the commutation.
It would also seem that this process would reduce excessive current during the less or most inefficient portion of the commutation cycle.
I would enjoy your comments about this approach or discussions of other methodologies.
Regards,
Bob
The motor current rises quickly at pulse turn-on, peaks at about 25% through the commutation cycle, declines to about 90% around 3/4 of the way through the cycle. Then followed by a quick current rise above the first rise (tail-end current or voltage spike) just prior to the commutation cycle end.
Since DC motor PWM speed control varies the amount of energy in the motor coil(s), I have considered using a phase and voltage biased high speed comparator into an AND chip to begin 'slowly' ramping down the MOSFET current prior to the end of the commutation.
This biased high-speed comparator would be provided perhaps, a sine wave several orders of magnitude greater than the base PWM clock rate.
This current ramping down would begin at the '75%' pulse low point to zero current flow by the end of the commutation.
It would also seem that this process would reduce excessive current during the less or most inefficient portion of the commutation cycle.
I would enjoy your comments about this approach or discussions of other methodologies.
Regards,
Bob