is the 16F690 AD crappy ? missing steps on 10bit AD

[dsicon]

Been banging my head against this one, using the PIC16F690 AD converter i have been getting a lot of missing steps and it sure seems like it is the part

first the obvious was checked, the input voltage is very clean and stable as is VDD, the source impedance is <10K, results are the same with and without a cap at the input, VREF=VDD
have tried another board with another chip, identical behavior

here is what i am doing:
using ADCIN (got same results doing it 'manually'), 10 bit, right justify

i vary the voltage slowly while monitoring on a scope, DMM and character LCD which is showing the AD values as i vary the voltage

for a smooth slowly rising input i get sequences like this in decimal:
682 683 685 687 691 695 696
it doesn't matter where in the range or whether ascending or descending i am getting missing counts of 2 - 5 steps

during the missed steps like from 687 - 691 i confirmed that the input voltage was changing normally

i have used PIC AD converters many times without seeing this so my conclusion is that this part is crummy, or is there something else to try ?

anyone have this missing codes experience on this chip or others ?
thanks
ds

[mackrackit]

You code try posting your code...

[dsicon]

i found the problem
i had to set bits 6:4 in ADCON1 to match the setting in the
Define ADC_CLOCK
after that it is working well now

so what about ANSEL ?
does ADCIN handle that automatically ?
it seems to work the same whether or not i explicitly set the ANSEL bits

[Darrel Taylor]

so what about ANSEL ?
does ADCIN handle that automatically ?
it seems to work the same whether or not i explicitly set the ANSEL bits

You can read Analog no matter which state ANSEL is in.
It's Digital that has a problem, and always reads 0 when ANSEL bits = 1.

Frankly, I think they should have called the register ... DIGSEL. :)

P.S.
But, when Digital is enabled on an analog pin, it adds an extra load, can throw off the analog impedance, and adds switching currents when the analog signal is near the input switching levels.
Especially prevalent on TTL inputs.