RB Change Interrupt understanding

[PickyBiker]

The 18F252 datasheet contains the following reference to the RB change interrupts:
"This interrupt can wake the device from SLEEP. The
user, in the Interrupt Service Routine, can clear the
interrupt in the following manner:
a) Any read or write of PORTB (except with the
MOVFF instruction). This will end the mismatch
condition.
b) Clear flag bit RBIF.
A mismatch condition will continue to set flag bit RBIF.
Reading PORTB will end the mismatch condition and
allow flag bit RBIF to be cleared."


Here is what I think this means:

When one of the monitored ports changes, a mismatch occurs and the RBIF flag gets set. The mismatch remains until a read or write to that port occurs.

If so, the ISR should first read or write the port to clear the mismatch and then reset the RBIF flag. That way the RBIF will stay reset until somethng else on the monitord ports changes.

Have I got this right?

[HenrikOlsson]

Hi,
That's how I interpret it as well. If you reset the RBIF without reading the port it would simply get the set again because the mismatch condition persists. Read the port to clear the mismatsh, then reset the RBIF.

/Henrik.

[Charles Linquis]

You need to read the port in order to give the device a sample that it can use for later comparison.

[PickyBiker]

Thanks Henrik and Charles. I am gradually getting an understanding of these PIC devices. This particular issue was troubling me because I wasn't sure if I was interpreting the datasheet correctly.

Thanks again.