Electroman87
- 22nd April 2009, 07:56
Now I have a problem im trying to configure the oscillator and the MCLR using assembly code in PB. the code I have is:
@ __CONFIG _INTOSCIO & _MCLRE_ON
Now what am I missing. Plus I get an error:
Overwriting Previous Address Contents (2007)
Im not sure if this is write at all im using a my electronics teachers example for a different model pic. But on this pic there is only one Configure Word with the address (2007h). Any help would be appreciated.
REGISTER 12-1: CONFIG – CONFIGURATION WORD (ADDRESS: 2007h)
Note: Address 2007h is beyond the user
program memory space. It belongs to the
special configuration memory space
(2000h-3FFFh), which can be accessed
only during programming. See
“PIC12F6XX/16F6XX Memory Programming
Specification” (DS41204) for more
information.
— — FCMEN IESO BODEN1 BODEN0 CPD CP MCLRE PWRTE WDTE FOSC2 FOSC1 FOSC0
bit 13 bit 0
bit 13-12 Unimplemented: Read as ‘1’
bit 11 FCMEN: Fail-Safe Clock Monitor Enabled bit
1 = Fail-Safe Clock Monitor is enabled
0 = Fail-Safe Clock Monitor is disabled
bit 10 IESO: Internal External Switchover bit
1 = Internal External Switchover mode is enabled
0 = Internal External Switchover mode is disabled
bit 9-8 BODEN<1:0>: Brown-out Detect Selection bits(1)
11 = BOD enabled
10 = BOD enabled during operation and disabled in Sleep
01 = BOD controlled by SBODEN bit (PCON<4>)
00 = BOD disabled
bit 7 CPD: Data Code Protection bit(2)
1 = Data memory code protection is disabled
0 = Data memory code protection is enabled
bit 6 CP: Code Protection bit(3)
1 = Program memory code protection is disabled
0 = Program memory code protection is enabled
bit 5 MCLRE: GP3/MCLR pin function select bit(4)
1 = GP3/MCLR pin function is MCLR
0 = GP3/MCLR pin function is digital input, MCLR internally tied to VDD
bit 4 PWRTE: Power-up Timer Enable bit
1 = PWRT disabled
0 = PWRT enabled
bit 3 WDTE: Watchdog Timer Enable bit
1 = WDT enabled
0 = WDT disabled and can be enabled by SWDTEN bit (WDTCON<0>)
bit 2-0 FOSC<2:0>: Oscillator Selection bits
111 = RC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN
110 = RCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN
101 = INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN
100 = INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN
011 = EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN
010 = HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN
001 = XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN
000 = LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN
@ __CONFIG _INTOSCIO & _MCLRE_ON
Now what am I missing. Plus I get an error:
Overwriting Previous Address Contents (2007)
Im not sure if this is write at all im using a my electronics teachers example for a different model pic. But on this pic there is only one Configure Word with the address (2007h). Any help would be appreciated.
REGISTER 12-1: CONFIG – CONFIGURATION WORD (ADDRESS: 2007h)
Note: Address 2007h is beyond the user
program memory space. It belongs to the
special configuration memory space
(2000h-3FFFh), which can be accessed
only during programming. See
“PIC12F6XX/16F6XX Memory Programming
Specification” (DS41204) for more
information.
— — FCMEN IESO BODEN1 BODEN0 CPD CP MCLRE PWRTE WDTE FOSC2 FOSC1 FOSC0
bit 13 bit 0
bit 13-12 Unimplemented: Read as ‘1’
bit 11 FCMEN: Fail-Safe Clock Monitor Enabled bit
1 = Fail-Safe Clock Monitor is enabled
0 = Fail-Safe Clock Monitor is disabled
bit 10 IESO: Internal External Switchover bit
1 = Internal External Switchover mode is enabled
0 = Internal External Switchover mode is disabled
bit 9-8 BODEN<1:0>: Brown-out Detect Selection bits(1)
11 = BOD enabled
10 = BOD enabled during operation and disabled in Sleep
01 = BOD controlled by SBODEN bit (PCON<4>)
00 = BOD disabled
bit 7 CPD: Data Code Protection bit(2)
1 = Data memory code protection is disabled
0 = Data memory code protection is enabled
bit 6 CP: Code Protection bit(3)
1 = Program memory code protection is disabled
0 = Program memory code protection is enabled
bit 5 MCLRE: GP3/MCLR pin function select bit(4)
1 = GP3/MCLR pin function is MCLR
0 = GP3/MCLR pin function is digital input, MCLR internally tied to VDD
bit 4 PWRTE: Power-up Timer Enable bit
1 = PWRT disabled
0 = PWRT enabled
bit 3 WDTE: Watchdog Timer Enable bit
1 = WDT enabled
0 = WDT disabled and can be enabled by SWDTEN bit (WDTCON<0>)
bit 2-0 FOSC<2:0>: Oscillator Selection bits
111 = RC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN
110 = RCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN
101 = INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN
100 = INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN
011 = EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN
010 = HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN
001 = XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN
000 = LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN