LCD setup


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Thread: LCD setup

  1. #1

    Default LCD setup

    Hi guys,

    i'm changing my lcd wires from the stardard configuration but i'm not getting this to work ( maybe it's too late and cant think right ) !!!

    The idea is to:
    lcd RS to pic RA4
    lcd E to pic RB4
    lcd DB to pic RB0,RB1,RB2,RB3

    i'm using these defines:

    Define LCD_DREG PORTB
    Define LCD_DBIT 0
    Define LCD_RSREG PORTA
    Define LCD_RSBIT 4
    Define LCD_EREG PORTB
    Define LCD_EBIT 4

    thanks
    Last edited by ruijc; - 17th November 2007 at 00:42.

  2. #2


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    you show RS on pin ra4 but define says rsbit 3. also typically ra4 is open collector or open drain as an output and will need a pullup resistor. which pic are you using?

  3. #3


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    hey no fair you changed it while i was posting. lol. ok so that leaves the pullup issue.

  4. #4


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    hehehe...

    sorry nomad,

    right now i'm slow thinking, but i got there

    i'm using a 16F628.
    Also have a pullup 100K resistor...but still not working...

    .

  5. #5


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    100k might be to large. too weak a pullup. i usually see 10k or even 4.7k as the pullup. check your input/output trisA settings and disable comparators, cmcon=7? ra4 is tied to cmp2.

  6. #6


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    oh yeah, also make sure the R/W line isn't left floating. needs to be grounded i believe. did you set 4 bit mode? DEFINE LCD_BITS 4. thats all i can think of without having the data sheet here or seeing the code. hope that helps.
    Last edited by nomad; - 17th November 2007 at 01:15. Reason: weeee too late to think.

  7. #7


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    Hi nomad,

    i think i know what's going on !

    the thing is that i moved the stardard configuration to give me the RA0 and RA1 free and use them for analog input.

    I have my code set for all PORTa to be input and analog...dahhh ( therefore the lcd RS to pic RA4 is not working )

    TRISA = %11111111 ' Set PORTA to all input
    ADCON1 = %10000010 ' Set PORTA analog and right justify result

    This is why it doesnt work.

    I need to set ONLY PORTA 0 and 1 ports analog and not all.

    I will remove the first line ( trisa = %1111111 ) because it doesnt make any sense.

    About the second line : ADCON = %10000010...

    how can i set only RA0 and RA1 analog and the rest of the portA digital ?

    thanks

  8. #8


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    You need the TRISA line. each bit determines input or output. so if you want ra4 as an output you need to change trisa to %11101111 also need cmcon=7 to disable the comparators. I dont have a data sheet to see what you need for adcon1 but the analog is for input only, and doesn't apply to a pin set to output. (as far as i understand) i think the cmcon and trisa lines should do the trick.

  9. #9


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  10. #10
    Join Date
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    you may have some problem with 16F628 and ADCON1... as it don't have any a/d converter.

    While it's always a good programming practice to set TRIS register, LCDOUT do it for you.

    Faulty i/o
    No contrast pot on LCD Vo line
    R/W pin not tied to GND
    no pull-up (~10K) on OpenCollector output
    floating MCLR input if used, or not disabled in code
    same thing for LVP mode,
    faulty/missing connections
    unsufficient LCD startup time

    are some things to check.
    Steve

    It's not a bug, it's a random feature.
    There's no problem, only learning opportunities.

  11. #11


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    Didn't know that about lcdout. Learn something new each day lol. That explains why i couldn't remember the settings for adcon1. Thanks MisterE.

  12. #12


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    Thank you all for the help.

    I started again from scratch and did some experiments moving the RS and E lines arround and all worked fine.
    Now i have to sucessfully move the data bus to Portb.

    I did not have the time yet to do so, but i will keep this thread updated.

    In other hand, i've just realised that i will not able to finish this project because the 16F628 does not have the A/D converter i need to measure temp. - seen the analog input and assumed that it also had A/D :s ( Thanks Mister_E ).

    Have to go and buy some 16F88s.

    .

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